Issued Patents All Time
Showing 1,426–1,450 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9123601 | Package on package structure | Mirng-Ji Lii, Hao-Yi Tsai, Hsien-Wei Chen, Kai-Chiang Wu | 2015-09-01 |
| 9117943 | Semiconductor package with through silicon vias | Ding-Yuan Chen, Wen-Chih Chiou | 2015-08-25 |
| 9116203 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chao-Hsiang Yang | 2015-08-25 |
| 9111896 | Package-on-package semiconductor device | Der-Chyang Yeh | 2015-08-18 |
| 9111949 | Methods and apparatus of wafer level package for heterogeneous integration technology | Der-Chyang Yeh | 2015-08-18 |
| 9105552 | Package on package devices and methods of packaging semiconductor dies | Chien-Hsiun Lee, Chen Yung Ching | 2015-08-11 |
| 9099337 | Integrated circuits having negative channel metal oxide semiconductor and positive channel metal oxide semiconductor | Chung-Shi Liu | 2015-08-04 |
| 9099515 | Reconfigurable guide pin design for centering wafers having different sizes | Hsin Chang, Hsin-Yu Chen, Fang Wen Tsai, Jing-Cheng Lin, Wen-Chih Chiou +1 more | 2015-08-04 |
| 9093447 | Chip on wafer bonder | Jui-Pin Hung, Weng-Jin Wu, Jean Wang, Wen-Chih Chiou | 2015-07-28 |
| 9093332 | Elongated bump structure for semiconductor devices | Tin-Hao Kuo, Yu-Feng Chen, Chen-Shien Chen, Sheng-Yu Wu, Chita Chuang | 2015-07-28 |
| 9087878 | Device with through-silicon via (TSV) and method of forming the same | Wen-Chih Chiou, Ebin Liao, Tsang-Jiuh Wu | 2015-07-21 |
| 9087877 | Low-k interconnect structures with reduced RC delay | Chung-Chi Ko, Ting-Yu Shen, Keng-Chu Lin, Chia-Cheng Chou, Tien-I Bao +1 more | 2015-07-21 |
| 9082761 | Polymer layers embedded with metal pads for heat dissipation | Hao-Hsiang Chuang, Shih-Wei Liang, Ching-Feng Yang, Kai-Chiang Wu, Hao-Yi Tsai +1 more | 2015-07-14 |
| 9082636 | Packaging methods and structures for semiconductor devices | Chih-Wei Lin, Kuei-Wei Huang, Yu-Peng Tsai, Chun-Cheng Lin, Meng-Tse Chen +7 more | 2015-07-14 |
| 9082765 | Bump-on-trace (BOT) structures and methods for forming the same | Chien-Hsun Lee, Jiun Yi Wu | 2015-07-14 |
| 9082763 | Joint structure for substrates and methods of forming | Da-Yuan Shih, Chih-Hang Tung | 2015-07-14 |
| 9076689 | Reducing resistance in source and drain regions of FinFETs | Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang | 2015-07-07 |
| 9064879 | Packaging methods and structures using a die attach film | Jui-Pin Hung, Jing-Cheng Lin, Nai-Wei Liu, Chin-Chuan Chang, Shin-Puu Jeng +3 more | 2015-06-23 |
| 9054047 | Exposing connectors in packages through selective treatment | Chung-Shi Liu, Chun-Cheng Lin, Meng-Tse Chen, Ming-Da Cheng | 2015-06-09 |
| 9048233 | Package systems having interposers | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng | 2015-06-02 |
| 9048259 | Dielectric punch-through stoppers for forming FinFETs having dual fin heights | Shih-Ting Hung, Cheng-Hung Chang, Chen-Yi Lee, Chen-Nan Yeh | 2015-06-02 |
| 9041215 | Single mask package apparatus and method | Mirng-Ji Lii, Hao-Yi Tsai, Hsien-Wei Chen, Hung-Yi Kuo | 2015-05-26 |
| 9040381 | Packages with passive devices and methods of forming the same | Shang-Yun Hou, Der-Chyang Yeh, Shuo-Mao Chen, Chiung-Han Yeh, Yi-Jou Lin | 2015-05-26 |
| 9040382 | Selective epitaxial growth of semiconductor materials with reduced defects | Jing-Cheng Lin | 2015-05-26 |
| 9023266 | Semiconductor molding chamber | Jing-Cheng Lin, Wen-Chih Chiou, Shin-Puu Jeng | 2015-05-05 |