Issued Patents All Time
Showing 1–25 of 393 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406704 | Multi-stage bit line pre-charge | Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin, Wei Min Chan +1 more | 2025-09-02 |
| 12408336 | Method for improving control gate uniformity during manufacture of processors with embedded flash memory | Meng-Han Lin | 2025-09-02 |
| 12400983 | Semiconductor packages and methods of manufacturing thereof | Harry-Hak-Lay Chuang, Wen-Tuo Huang, Yu-Ling Hsu, Pai Chi Chou, Ya-Chi Hung | 2025-08-26 |
| 12394754 | Device and method for UBM/RDL routing | Meng-Tsan Lee, Tsung-Shu Lin | 2025-08-19 |
| 12389672 | Method to embed planar FETs with finFETs | Harry-Hak-Lay Chuang, Li-Feng Teng, Li-Jung Liu | 2025-08-12 |
| 12389496 | Moveable gripper for gripping a container and heating contents of the container through dynamically controlled thermal contact and heat settings | James Daniel Tremel, Matthew James Manelis, Chun Keung Wong, Todd Mahlon Strubhar | 2025-08-12 |
| 12381158 | Wafer bonding method and bonded device structure | Harry Chuang, Yuan-Jen Lee, Nuo Xu, Fang-Lan Chu | 2025-08-05 |
| 12374658 | Bonded wafer device structure and methods for making the same | Harry-Hak-Lay Chuang, Wen-Tuo Huang | 2025-07-29 |
| 12376298 | Semiconductor device and manufacturing method thereof | Chen-Chin Liu, Yi Hsien Lu, Yu-Hsiung Wang, Juo-Li Yang | 2025-07-29 |
| 12342610 | Method of manufacturing semiconductor device | Harry-Hak-Lay Chuang | 2025-06-24 |
| 12336229 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Shih-Chang Liu, Harry-Hak-Lay Chuang, Chia-Shiung Tsai | 2025-06-17 |
| 12327819 | Devices employing thermal and mechanical enhanced layers and methods of forming same | Chen-Hua Yu, An-Jhih Su, Wei-Yu Chen, Ying-Ju Chen, Tsung-Shu Lin +5 more | 2025-06-10 |
| 12322715 | Method of forming integrated chip structure having slotted bond pad in stacked wafer structure | Harry-Hak-Lay Chuang, Li-Feng Teng | 2025-06-03 |
| 12324156 | Memory devices and method of fabricating same | Chang-Ming Wu, Shih-Chang Liu, Harry-Hak-Lay Chuang, Chia-Shiung Tsai | 2025-06-03 |
| 12322727 | Device and method for UBM/RDL routing | Meng-Tsan Lee, Tsung-Shu Lin | 2025-06-03 |
| 12322726 | Method of forming an integrated circuit package having a padding layer on a carrier | Cheng-Hsien Hsieh, Li-Han Hsu, Der-Chyang Yeh, Wei-Chih Lai | 2025-06-03 |
| 12317488 | Structure and method for preventing silicide contamination during the manufacture of micro-processors with embedded flash memory | Meng-Han Lin | 2025-05-27 |
| 12302584 | Embedded ferroelectric memory in high-k first technology | Pai Chi Chou | 2025-05-13 |
| 12278166 | High bandwidth package structure | Harry Chuang, Wen-Tuo Huang, Yu-Ling Hsu, Pai Chi Chou, Ya-Chi Hung | 2025-04-15 |
| 12255133 | Electrical fuse (e-fuse) one-time programmable (OTP) device and manufacturing method thereof | Alexander Kalnitsky, Harry-Hak-Lay Chuang, Chia-Wen Liang, Li-Feng Teng | 2025-03-18 |
| 12256549 | Boundary design to reduce memory array edge CMP dishing effect | Chien-Hung Chang | 2025-03-18 |
| 12224247 | Fan-out package having a main die and a dummy die | Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Hsien-Wei Chen | 2025-02-11 |
| 12217975 | Semiconductor device having metal gate and poly gate | Alexander Kalnitsky, Harry-Hak-Lay Chuang | 2025-02-04 |
| 12205634 | Electronic circuits, memory devices, and methods for operating an electronic circuit | Pei-Yuan Li, Kao-Cheng Lin, Chien Hui HUANG, Yung-Ning TU | 2025-01-21 |
| 12191239 | Stacked via structure disposed on a conductive pillar of a semiconductor die | Che-Yu Yeh, Tsung-Shu Lin, Tsung-Yu Chen, Li-Han Hsu, Chien-Fu Tseng | 2025-01-07 |