Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12376298 | Semiconductor device and manufacturing method thereof | Wei-Cheng Wu, Yi Hsien Lu, Yu-Hsiung Wang, Juo-Li Yang | 2025-07-29 |
| 12167594 | Semiconductor device and manufacturing method thereof | Wei-Cheng Wu, Yi Hsien Lu, Yu-Hsiung Wang, Juo-Li Yang | 2024-12-10 |
| 11895836 | Anti-dishing structure for embedded memory | Meng-Han Lin, Chih-Ren Hsieh, Chih-Pin Huang | 2024-02-06 |
| 11430799 | Semiconductor device and manufacturing method thereof | Wei-Cheng Wu, Yi Hsien Lu, Yu-Hsiung Wang, Juo-Li Yang | 2022-08-30 |
| 11264292 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Ya-Chen Kao, Chih-Pin Huang | 2022-03-01 |
| 11195834 | Semiconductor device having deep wells | Meng-Han Lin, Chih-Ren Hsieh | 2021-12-07 |
| 11088040 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Ya-Chen Kao, Chih-Pin Huang | 2021-08-10 |
| 11031294 | Semiconductor device and a method for fabricating the same | Meng-Han Lin, Chih-Ren Hsieh | 2021-06-08 |
| 10804281 | Anti-dishing structure for embedded memory | Meng-Han Lin, Chih-Ren Hsieh, Chih-Pin Huang | 2020-10-13 |
| 10741569 | Semiconductor device and manufacturing method thereof | Wei-Cheng Wu, Yi Hsien Lu, Yu-Hsiung Wang, Juo-Li Yang | 2020-08-11 |
| 10644000 | Semiconductor device having deep wells | Meng-Han Lin, Chih-Ren Hsieh | 2020-05-05 |
| 10535574 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Ya-Chen Kao, Chih-Pin Huang | 2020-01-14 |
| 10134644 | Method of manufacturing a semiconductor device having deep wells | Meng-Han Lin, Chih-Ren Hsieh | 2018-11-20 |
| 10049939 | Semiconductor device and a method for fabricating the same | Meng-Han Lin, Chih-Ren Hsieh | 2018-08-14 |
| 9847399 | Semiconductor device and a method for fabricating the same | Meng-Han Lin, Chih-Ren Hsieh, Zhen-Yu Yang | 2017-12-19 |
| 9831134 | Method of manufacturing a semiconductor device having deep wells | Meng-Han Lin, Chih-Ren Hsieh | 2017-11-28 |
| 9679909 | Method for manufacturing a finger trench capacitor with a split-gate flash memory cell | Harry-Hak-Lay Chuang, Yu-Hsiung Wang | 2017-06-13 |
| 9590059 | Interdigitated capacitor to integrate with flash memory | Harry-Hak-Lay Chuang, Yu-Hsiung Wang | 2017-03-07 |
| 9570539 | Integration techniques for MIM or MIP capacitors with flash memory and/or high-κ metal gate CMOS technology | Harry-Hak-Lay Chuang, Yu-Hsiung Wang | 2017-02-14 |
| 8354335 | Apparatus and associated method for making a floating gate cell with increased overlay between the control gate and floating gate | Lan Huang, Ling Yang, Po Hsuan Wu | 2013-01-15 |
| 8017480 | Apparatus and associated method for making a floating gate cell in a virtual ground array | Chun-Pei Wu, Ta-Kang Chu, Yao-Fu Chan | 2011-09-13 |
| 7879708 | Apparatus and associated method for making a floating gate cell with increased overlay between the control gate and floating gate | Lan Huang, Ling Yang, Po Hsuan Wu | 2011-02-01 |
| 7403430 | Erase operation for use in non-volatile memory | Cheng-Jye Liu, Lan Huang | 2008-07-22 |
| 7286396 | Bit line selection transistor layout structure | Ling Yang, Lan Huang, Po Hsuan Wu | 2007-10-23 |
| 7183608 | Memory array including isolation between memory cell and dummy cell portions | Lan Huang, Cheng-Jye Liu | 2007-02-27 |