Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7132302 | Method of increasing cell retention capacity of silicon nitride read-only-memory cell | Kuen-Chi Chuang, Jiong Chen | 2006-11-07 |
| 7064032 | Method for forming non-volatile memory cell with low-temperature-formed dielectric between word and bit lines, and non-volatile memory array including such memory cells | Fu-Shiung Hsu, Lan Huang | 2006-06-20 |
| 6930928 | Method of over-erase prevention in a non-volatile memory device and related structure | Cheng Pan | 2005-08-16 |
| 6909131 | Word line strap layout structure | Ken-Hui Chen, Lan Huang | 2005-06-21 |
| 6869843 | Non-volatile memory cell with dielectric spacers along sidewalls of a component stack, and method for forming same | Fu-Shiung Hsu | 2005-03-22 |
| 6784053 | Method for preventing bit line to bit line leakage in memory cell | Chia-Hsing Chen, Jiunn-Liang Li | 2004-08-31 |
| 6617204 | Method of forming the protective film to prevent nitride read only memory cell charging | Jiann-Long Sung, Li-Yeh Chou | 2003-09-09 |
| 6610586 | Method for fabricating nitride read-only memory | — | 2003-08-26 |
| 6576514 | Method of forming a three-dimensional polysilicon layer on a semiconductor wafer | Chin-Yi Huang, Weng-Hsing Huang | 2003-06-10 |
| 6514831 | Nitride read only memory cell | — | 2003-02-04 |
| 6509231 | Nitride ready only memory cell with two top oxide layers and the method for manufacturing the same | Li-Jen Chen | 2003-01-21 |
| 6501123 | High gate coupling non-volatile memory structure | — | 2002-12-31 |
| 6468864 | Method of fabricating silicon nitride read only memory | Jiann-Long Sung, Chia-Hsing Chen | 2002-10-22 |
| 6191000 | Shallow trench isolation method used in a semiconductor wafer | Chin-Yi Huang, Chin-Jen Huang, Yun Chang | 2001-02-20 |