Issued Patents All Time
Showing 1–25 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12366682 | Display device | Shu-Cheng KUNG, Ken-Yu Liu | 2025-07-22 |
| 11672124 | High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Yi Hsien Lu | 2023-06-06 |
| 11600618 | Integrated circuit structure and manufacturing method thereof | Harry-Hak-Lay Chuang, Li-Feng Teng, Wei-Cheng Wu, Fang-Lan Chu | 2023-03-07 |
| 11264292 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Chen-Chin Liu, Chih-Pin Huang | 2022-03-01 |
| 11257816 | Method for manufacturing semiconductor device including dummy gate electrodes | Harry-Hak-Lay Chuang, Wei-Cheng Wu | 2022-02-22 |
| 11088040 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Chen-Chin Liu, Chih-Pin Huang | 2021-08-10 |
| 11063058 | Memory device with metal gate | Harry-Hak-Lay Chuang, Wei-Cheng Wu | 2021-07-13 |
| 10971544 | Integration of magneto-resistive random access memory and capacitor | Chung-Cheng Chou, Tien-Wei Chiang | 2021-04-06 |
| 10957704 | High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Yi Hsien Lu | 2021-03-23 |
| 10827154 | Display device with rear light transmitting module | Jui-Sheng Wu, Tsai-Fen Wu | 2020-11-03 |
| 10658373 | Method for manufacturing semiconductor device with metal gate memory device and metal gate logic device | Harry-Hak-Lay Chuang, Wei-Cheng Wu | 2020-05-19 |
| 10535675 | High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Yi Hsien Lu | 2020-01-14 |
| 10535574 | Cell-like floating-gate test structure | Meng-Han Lin, Chih-Ren Hsieh, Chen-Chin Liu, Chih-Pin Huang | 2020-01-14 |
| 10522591 | Integration of magneto-resistive random access memory and capacitor | Chung-Cheng Chou, Tien-Wei Chiang | 2019-12-31 |
| 10473830 | Display device with haze layer | Wang-Shuo Kao, Yu-Han Chiang, Kai-Chieh Chang, Shang-Chiang Lin | 2019-11-12 |
| 10276588 | HKMG high voltage CMOS for embedded non-volatile memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Yi Hsien Lu | 2019-04-30 |
| 10068773 | Contact formation for split gate flash memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Chin-Yi Huang | 2018-09-04 |
| 10050050 | Semiconductor device with metal gate memory device and metal gate logic device and method for manufacturing the same | Harry-Hak-Lay Chuang, Wei-Cheng Wu | 2018-08-14 |
| 10050047 | Method to improve floating gate uniformity for non-volatile memory device | Harry-Hak-Lay Chuang, Chin-Yi Huang | 2018-08-14 |
| 9735245 | Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Shih-Chang Liu | 2017-08-15 |
| 9659953 | HKMG high voltage CMOS for embedded non-volatile memory | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Yi Hsien Lu | 2017-05-23 |
| 9627392 | Method to improve floating gate uniformity for non-volatile memory devices | Harry-Hak-Lay Chuang, Chin-Yi Huang | 2017-04-18 |
| 9431413 | STI recess method to embed NVM memory in HKMG replacement gate technology | Harry-Hak-Lay Chuang, Wei-Cheng Wu | 2016-08-30 |
| 9425206 | Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Shih-Chang Liu, Fang-Lan Chu | 2016-08-23 |
| 9412721 | Contactless communications using ferromagnetic material | Ping-Lin Yang, Jun-De Jin, Fu-Lung Hsueh, Sa-Lly Liu, Tong-Chern Ong +1 more | 2016-08-09 |