Issued Patents All Time
Showing 1–25 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406704 | Multi-stage bit line pre-charge | Wei-Cheng Wu, Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin +1 more | 2025-09-02 |
| 12334178 | Integrated circuit, system and method of forming the same | Yen Lin CHUNG, Kao-Cheng Lin, Yen-Huei Chen | 2025-06-17 |
| 12300605 | Reducing internal node loading in combination circuits | Chien-Yuan Chen, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh, Kao-Cheng Lin | 2025-05-13 |
| 12245412 | SRAM cell word line structure with reduced RC effects | Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Hung-Jen Liao | 2025-03-04 |
| 12165731 | Memory device | Chien-Chen Lin | 2024-12-10 |
| 12106800 | Adaptive word line control circuit | Chien-Chen Lin, Pei-Yuan Li, Hsiang-Yun Lin, Shang-Lin Wu | 2024-10-01 |
| 12094773 | Methods for low resistivity and stress tungsten gap fill | Xi Cen, Kai Wu, Min Heon, Tom Ho Wing Yu, Peiqi WANG +4 more | 2024-09-17 |
| 11961554 | Shared power footer circuit | Hidehiro Fujiwara, Kao-Cheng Lin, Yen-Huei Chen | 2024-04-16 |
| 11854970 | Reducing internal node loading in combination circuits | Chien-Yuan Chen, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh, Kao-Cheng Lin | 2023-12-26 |
| 11798845 | Methods and apparatus for low resistivity and stress tungsten gap fill | Xi Cen, Kai Wu, Min Heon, Tom Ho Wing Yu, Peiqi WANG +4 more | 2023-10-24 |
| 11790958 | Memory device | Chien-Chen Lin | 2023-10-17 |
| 11778802 | SRAM cell word line structure with reduced RC effects | Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Hung-Jen Liao | 2023-10-03 |
| 11749321 | Multi-stage bit line pre-charge | Wei-Cheng Wu, Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin +1 more | 2023-09-05 |
| 11675505 | Configurable memory storage system | Yu-Hao Hsu, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu +6 more | 2023-06-13 |
| 11610628 | Static random access memory | Wei-Cheng Wu, Hung-Jen Liao, Ping-Wei Wang, Yen-Huei Chen | 2023-03-21 |
| 11574674 | SRAM based authentication circuit | Chien-Chen Lin, Chih-Yu Lin, Shih-Lien Linus Lu, Yen-Huei Chen | 2023-02-07 |
| 11574098 | Method for eliminating false paths of a circuit unit to be implemented using a system | Chun-Jiun Dai, Hung-Jen Liao, Yen-Huei Chen | 2023-02-07 |
| 11450605 | Reducing internal node loading in combination circuits | Chien-Yuan Chen, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh, Kao-Cheng Lin | 2022-09-20 |
| 11417370 | Memory device | Chien-Chen Lin | 2022-08-16 |
| 11301148 | Configurable memory storage system | Yu-Hao Hsu, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu +6 more | 2022-04-12 |
| 11264088 | Semiconductor memory with respective power voltages for memory cells | Wei-Cheng Wu, Chih-Yu Lin, Kao-Cheng Lin, Yen-Huei Chen | 2022-03-01 |
| 11263331 | Electronic device for checking randomness of identification key device, random key checker circuit, and method of checking randomness of electronic device | Chien-Chen Lin, Hidehiro Fujiwara, Yen-Huei Chen, Shih-Lien Linus Lu | 2022-03-01 |
| 11196574 | Physically unclonable function (PUF) generation | Chien-Chen Lin, Chih-Yu Lin, Shih-Lien Linus Lu | 2021-12-07 |
| 11100964 | Multi-stage bit line pre-charge | Wei-Cheng Wu, Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin +1 more | 2021-08-24 |
| 11048840 | Method for eliminating false paths of a circuit unit to be implemented using a system | Chun-Jiun Dai, Hung-Jen Liao, Yen-Huei Chen | 2021-06-29 |