Issued Patents All Time
Showing 1–25 of 268 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417799 | Memory circuit and write method | Bo-Feng Young, Han-Jong Chia, Yu-Ming Lin, Sai-Hooi Yeong | 2025-09-16 |
| 12406098 | Systems and methods for classifying puf signature modules of integrated circuits | Cheng-En Lee | 2025-09-02 |
| 12380947 | Systems and methods to store multi-level data | — | 2025-08-05 |
| 12348626 | Integrated circuit (IC) signatures with random number generator and one-time programmable device | Kun-Hsi Li, Shih-Liang Wang, Jonathan Tsung-Yung Chang, Yu-Der Chih, Cheng-En Lee | 2025-07-01 |
| 12283554 | Integrated circuit layout, integrated circuit, and method for fabricating the same | — | 2025-04-22 |
| 12243621 | Buffer control of multiple memory banks | — | 2025-03-04 |
| 12244741 | Physical unclonable function (PUF) security key generation | Saman M. I. Adham, Peter Noel | 2025-03-04 |
| 12236001 | Method and apparatus for protecting a PUF generator | — | 2025-02-25 |
| 12237197 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Cormac Michael O'Connell | 2025-02-25 |
| 12229006 | Integrated circuit and method of operating same | — | 2025-02-18 |
| 12200148 | Method and apparatus for noise injection for PUF generator characterization | Cheng-En Lee | 2025-01-14 |
| 12190945 | SRAM power-up random number generator | Jui-Che Tsai, Chen-Lin Yang, Yu-Hao Hsu | 2025-01-07 |
| 12181968 | System and method of reducing logic for multi-bit error correcting codes | — | 2024-12-31 |
| 12181991 | Memory block age detection | — | 2024-12-31 |
| 12184795 | PUF method and structure | Saman M. I. Adham, Yu-Der Chih | 2024-12-31 |
| 12176016 | Memory device having bitline segmented into bitline segments and related method for operating memory device | Fong-Yuan Chang, Yi-Chun Shih | 2024-12-24 |
| 12169676 | PUF cell array, system and method of manufacturing same | Cheng-En Lee | 2024-12-17 |
| 12154867 | Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell | — | 2024-11-26 |
| 12146798 | Thin film transistor based temperature sensor | Katherine H. Chiang | 2024-11-19 |
| 12148465 | Method of operating an integrated circuit and integrated circuit | — | 2024-11-19 |
| 12149643 | Device signature based on trim and redundancy information | Katherine H. Chiang | 2024-11-19 |
| 12135608 | Memory address protection circuit including an error detection circuit and method of operating same | Saman M. I. Adham, Ramin SHARIAT-YAZDI | 2024-11-05 |
| 12137569 | Memory device and method of forming the same | Chao-I Wu, Yu-Ming Lin, Sai-Hooi Yeong, Bo-Feng Young | 2024-11-05 |
| 12126358 | Two-level error correcting code with sharing of check-bits | — | 2024-10-22 |
| 12114506 | Semiconductor structure and method of fabricating the same | Bo-Feng Young, Sai-Hooi Yeong, Chia-En Huang, Yih Wang, Yu-Ming Lin | 2024-10-08 |