Issued Patents All Time
Showing 25 most recent of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12237197 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Shih-Lien Linus Lu | 2025-02-25 |
| 12177370 | PUF generators based on SRAM bit cells | — | 2024-12-24 |
| 12080581 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Shih-Lien Linus Lu | 2024-09-03 |
| 12074992 | Method and apparatus for logic cell-based PUF generators | Shih-Lien Linus Lu | 2024-08-27 |
| 11847345 | Memory circuit including an array control inhibitor | Sanjeev Kumar Jain | 2023-12-19 |
| 11811953 | Method and apparatus for logic cell-based PUF generators | Shih-Lien Linus Lu | 2023-11-07 |
| 11676658 | Orthogonal dual port RAM (ORAM) | — | 2023-06-13 |
| 11664258 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Shih-Lien Linus Lu | 2023-05-30 |
| 11403033 | Memory circuit including an array control inhibitor | Sanjeev Kumar Jain | 2022-08-02 |
| 11258596 | System to generate a signature key and method of operating the same | Shih-Lien Linus Lu | 2022-02-22 |
| 11100980 | Orthogonal dual port ram (ORAM) | — | 2021-08-24 |
| 11043404 | Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current | Shih-Lien Linus Lu | 2021-06-22 |
| 11005669 | PUF generators based on SRAM bit cells | — | 2021-05-11 |
| 10958270 | Physical unclonable device and method of maximizing existing process variation for a physically unclonable device | Shih-Lien Linus Lu, Kun-Hsi Li | 2021-03-23 |
| 10880102 | Method and apparatus for logic cell-based PUF generators | Shih-Lien Linus Lu | 2020-12-29 |
| 10789994 | Memory architecture having first and second voltages | Atul Katoch | 2020-09-29 |
| 10515690 | Memory architecture and method of access thereto | Atul Katoch | 2019-12-24 |
| 10483971 | Physical unclonable device and method of maximizing existing process variation for a physically unclonable device | Shih-Lien Linus Lu, Kun-Hsi Li | 2019-11-19 |
| 10468075 | Memory architecture having first and second voltages | Atul Katoch | 2019-11-05 |
| 9916874 | Memory architecture having first and second voltages | Atul Katoch | 2018-03-13 |
| 9805779 | Writing to multi-port memories | Atul Katoch | 2017-10-31 |
| 9443574 | Memory architecture | Atul Katoch | 2016-09-13 |
| 9396815 | Memory structure | — | 2016-07-19 |
| 9396817 | Self-repairing memory and method of use | — | 2016-07-19 |
| 9368191 | Time division multiplexing sense amplifier | — | 2016-06-14 |