| 5265064 |
Pulse generator circuit arrangement |
Thomas Davies, Leonardus C. M. G. Pfennings, Henricus Kunnen, Peter Voss, Cormac Michael O'Connell +1 more |
1993-11-23 |
| 5224071 |
Addressable memory unit having an improved unit selection circuit |
Cormac Michael O'Connell, Leonardus C. M. G. Pfennings, Peter Voss, Thomas Davies, Cathal G. Phelan |
1993-06-29 |
| 5212413 |
Stable, programmable low-dissipation reference circuit |
Cathal G. Phelan, Peter Voss, Thomas Davies, Cormac Michael O'Connell, Leonardus C. M. G. Pfennings +1 more |
1993-05-18 |
| 5087840 |
Integrated output buffer logic circuit with a memory circuit |
Thomas Davies, Leonardus C. M. G. Pfennings, by Henricus J. Kunnen, legal representative, Peter Voss, Cormac Michael O'Connell +1 more |
1992-02-11 |
| 5040152 |
Fast static random access memory with high storage capacity |
Peter Voss, Leonardus C. M. G. Pfennings, Cormac Michael O'Connell, Thomas Davies, Cathal G. Phelan |
1991-08-13 |
| 5033024 |
Matrix memory with redundancy and minimizes delay |
Cormac Michael O'Connell, Leonardus C. M. G. Pfennings, by Henricus J. Kunnen, legal representative, Peter Voss, Thomas Davies +1 more |
1991-07-16 |
| 4951254 |
Static memory unit having a plurality of test modes, and computer equipped with such units |
Roelof H. W. Salters, Betty Prince, Thomas Davies, Cathal G. Phelan, Cormac Michael O'Connell +3 more |
1990-08-21 |
| 4931667 |
Circuit arrangement for a dual bus line |
Leonardus C. M. G. Pfennings, Peter Voss, Cormac Michael O'Connell, Cathal G. Phelan, Thomas Davies |
1990-06-05 |
| 4929911 |
Push-pull output circuit having three transistors |
Thomas Davies, Evert Seevinck, Leonardus C. M. G. Pfennings, Henricus J. Kennen, Peter Voss +2 more |
1990-05-29 |