Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Peter Voss — 48 Patents

U.S. Philips: 11 patents #225 of 8,851Top 3%
Siemens Aktiengesellschaft: 9 patents #1,230 of 22,248Top 6%
Cypress Semiconductor: 7 patents #267 of 1,852Top 15%
SASandcraft: 5 patents #4 of 15Top 30%
JAJagenberg Aktiengesellschaft: 4 patents #15 of 77Top 20%
JGJagenberg Papiertechnik Gmbh: 3 patents #7 of 32Top 25%
Motorola: 2 patents #5,225 of 14,142Top 40%
RMRmi: 1 patents #12 of 42Top 30%
EKEheim Gmbh & Co. Kg: 1 patents #6 of 14Top 45%
Overall (All Time): #57,596 of 4,157,543Top 2%
48 Patents All Time
Peter Voss has been granted 48 US patents while listed as an inventor at U.S. Philips. The first was granted in 1981 and the most recent in March 2020. Peter Voss ranks #57,596 of 4,157,543 US inventors in our database (top 1.4%). Patent records list Peter Voss in Cologne, TX, DE.

Issued Patents All Time

Showing 1–25 of 48 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10585913 Apparatus and method for distributed query processing utilizing dynamically generated in-memory term maps Matthew McManus, Holger Schulze, Johannes Zillmann, Martin Nettling 2020-03-10
10467569 Apparatus and method for scheduling distributed workflow tasks Kelly Nawrocke, Matthew McManus 2019-11-05
7898852 Trapped-charge non-volatile memory with uniform multilevel programming Sagy Levy, Krishnaswamy Ramkumar 2011-03-01 $8,485,000
7487369 Low-power cache system and method Mayank Gupta, Edward T. Pak, Javier Villagomez 2009-02-03
6400599 Cache memory cell with a pre-programmed state 2002-06-04
6359316 Method and apparatus to prevent latch-up in CMOS devices Andrew J. Walker, Jeff Watt, Ashish Pancholy, Cathal G. Phelan, Patrick Zicolello +1 more 2002-03-19 $19,540,000
6318954 Device for stacking sheets, in particular sheet-fed paper or cardboard sheets delivered onto pallets Ernst Claassen 2001-11-20
6255879 Digital programmable delay element 2001-07-03
6252819 Reduced line select decoder for a memory array 2001-06-26
6252818 Apparatus and method for operating a dual port memory cell 2001-06-26
6131140 Integrated cache memory with system control logic and adaptation of RAM bus to a cache pinout Thurman J. Rodgers, Raymond M. Leong, Tek Wei 2000-10-10 $36,751,000
6070229 Cache memory cell with a pre-programmed state 2000-05-30
6054727 Power semiconductor component 2000-04-25
5923582 SRAM with ROM functionality 1999-07-13 $6,647,000
5689471 Dummy cell for providing a reference voltage in a memory array Jeffrey L. Linden 1997-11-18 $6,567,000
5664767 Method of stacking continuously arriving sheets 1997-09-09
5628505 Apparatus for stacking continuously arriving sheets 1997-05-13
5453950 Five transistor memory cell with shared power line Jeffrey L. Linden 1995-09-26 $9,584,000
5386153 Buffer with pseudo-ground hysteresis Shahryar Aryani 1995-01-31 $8,825,000
5299792 Apparatus for inserting a marker strip in a stack of sheets during the stacking thereof Rolf Kollann, Hans-Georg Sippel, Ralf Zehl 1994-04-05
5265064 Pulse generator circuit arrangement Thomas Davies, Leonardus C. M. G. Pfennings, Henricus Kunnen, Cormac Michael O'Connell, Cathal G. Phelan +1 more 1993-11-23
5245585 Random access memory with page addressing mode Cormac Michael O'Connell 1993-09-14
5240369 Apparatus for stacking sheets Ralf Zehl, Ernst Claassen 1993-08-31
5227998 Fast static random access memory 1993-07-13
5224071 Addressable memory unit having an improved unit selection circuit Cormac Michael O'Connell, Leonardus C. M. G. Pfennings, Thomas Davies, Hans Ontrop, Cathal G. Phelan 1993-06-29