Issued Patents All Time
Showing 1,376–1,400 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| D752352 | Seat | Philippe Erhel, Adrian Goring, Dorothee Redon | 2016-03-29 |
| 9299785 | Reducing resistance in source and drain regions of FinFETs | Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang | 2016-03-29 |
| 9299688 | Packaged semiconductor devices and methods of packaging semiconductor devices | Chung-Shi Liu, Chih-Fan Huang, Hui-Min Huang, Wei-Hung Lin, Ming-Da Cheng | 2016-03-29 |
| 9299676 | Through silicon via structure | Shin-Puu Jeng, Wen-Chih Chiou, Fang Wen Tsai, Chen-Yu Tsai | 2016-03-29 |
| 9299674 | Bump-on-trace interconnect | Chen-Shien Chen | 2016-03-29 |
| 9291913 | Pattern generator for a lithography system | Tien-I Bao, Chih Wei Lu, Jaw-Jung Shin, Shy-Jay Lin, Burn Jeng Lin | 2016-03-22 |
| 9293418 | Backside through vias in a bonded structure | Weng-Jin Wu, Ku-Feng Yang, Hung-Pin Chang, Wen-Chih Chiou | 2016-03-22 |
| 9293437 | Functional block stacked 3DIC and method of making same | Kuo-Chung Yee, Chih-Hang Tung | 2016-03-22 |
| 9293369 | Three-dimensional integrated circuit (3DIC) | Chih-Wei Wu, Szu-Wei Lu, Jing-Cheng Lin, Shin-Puu Jeng | 2016-03-22 |
| 9287172 | Interposer-on-glass package method | Jing-Cheng Lin | 2016-03-15 |
| 9287166 | Barrier for through-silicon via | Wen-Chih Chiou, Weng-Jin Wu | 2016-03-15 |
| 9287143 | Apparatus for package reinforcement using molding underfill | Hsien-Wei Chen, Tsung-Yuan Yu, Wen-Hsiung Lu, Ming-Da Cheng, Hao-Yi Tsai +1 more | 2016-03-15 |
| 9287440 | Method of manufacturing a semiconductor device including through silicon plugs | Hung-Pin Chang, Yung-Chi Lin, Chia-Lin Yu, Jui-Pin Hung, Chien Ling Hwang | 2016-03-15 |
| 9281297 | Solution for reducing poor contact in info packages | Jing-Cheng Lin, Szu-Wei Lu, Shih-Ting Lin, Shin-Puu Jeng | 2016-03-08 |
| 9281254 | Methods of forming integrated circuit package | Chi-Hsi Wu, Wen-Chih Chiou, Hsiang-Fan Lee, Shih-Peng Tai, Tang-Jung Chiu | 2016-03-08 |
| 9275964 | Substrate contact opening | Jiun Yi Wu | 2016-03-01 |
| 9275925 | System and method for an improved interconnect structure | Hsien-Wei Chen, Hao-Yi Tsai, Mirng-Ji Lii, Tsung-Yuan Yu | 2016-03-01 |
| 9263407 | Method for manufacturing a plurality of metal posts | Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih | 2016-02-16 |
| 9263511 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Shang-Yun Hou, Wen-Chih Chiou, Jui-Pin Hung, Der-Chyang Yeh, Chiung-Han Yeh | 2016-02-16 |
| 9263377 | POP structures with dams encircling air gaps and methods for forming the same | Tsung-Ding Wang, Chen-Shien Chen, Chung-Shi Liu, Jiun Yi Wu | 2016-02-16 |
| 9257506 | CMOS devices having dual high-mobility channels | Ding-Yuan Chen | 2016-02-09 |
| 9252135 | Packaged semiconductor devices and methods of packaging semiconductor devices | Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng | 2016-02-02 |
| 9240349 | Interconnect structures for substrate | Wen-Chih Chiou, Shin-Puu Jeng, Tsang-Jiuh Wu | 2016-01-19 |
| 9240387 | Wafer-level chip scale package with re-workable underfill | Hsien-Wei Chen, Tsung-Ding Wang, Chien-Hsiun Lee, Hao-Yi Tsai, Mirng-Ji Lii | 2016-01-19 |
| 9236277 | Integrated circuit with a thermally conductive underfill and methods of forming same | Tien-I Bao | 2016-01-12 |