Issued Patents All Time
Showing 1–25 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399432 | Semiconductor fabrication apparatus and method of using the same | Yu-Der Chih, May-Be Chen, Ya-Chin King, Chrong-Jung Lin, Bo-Yu Lin | 2025-08-26 |
| 12249662 | Semiconductor device, manufacturing method thereof, and detecting method using the same | Ya-Chin King, Chrong-Jung Lin, Shi-Jiun WANG | 2025-03-11 |
| 12211949 | Semiconductor detector | Ya-Chin King, Chrong-Jung Lin, Shi-Jiun WANG | 2025-01-28 |
| 12142537 | Defect measurement method | Chrong-Jung Lin, Ya-Chin King, Yi-Pei Tsai | 2024-11-12 |
| 12009177 | Detection using semiconductor detector | Ya-Chin King, Chrong-Jung Lin, Chien-Ping Wang, Shao-Hua Wang, Chun-Lin Chang +1 more | 2024-06-11 |
| 11824133 | Detection using semiconductor detector | Ya-Chin King, Chrong-Jung Lin, Shi-Jiun WANG | 2023-11-21 |
| 11335609 | Micro detector | Chrong-Jung Lin, Ya-Chin King, Yi-Pei Tsai | 2022-05-17 |
| 11061317 | Method of fabricating an integrated circuit with non-printable dummy features | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2021-07-13 |
| 11003097 | Immersion lithography system using a sealed wafer bath | Ching-Yu Chang | 2021-05-11 |
| 10811225 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2020-10-20 |
| 10520836 | Immersion lithography system using a sealed wafer bath | Ching-Yu Chang | 2019-12-31 |
| 10431423 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2019-10-01 |
| 10359695 | Method of fabricating an integrated circuit with non-printable dummy features | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2019-07-23 |
| 10170276 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2019-01-01 |
| 10168625 | Immersion lithography system using a sealed wafer bath | Ching-Yu Chang | 2019-01-01 |
| 9934991 | Method and apparatus for planarizing material layers | — | 2018-04-03 |
| 9911575 | Apparatus for charged particle lithography system | Shih-Chi Wang, Tsung-Chih Chien, Hui-Min Huang, Jaw-Jung Shin, Shy-Jay Lin | 2018-03-06 |
| 9810994 | Systems and methods for high-throughput and small-footprint scanning exposure for lithography | Shy-Jay Lin, Jaw-Jung Shin, Wen-Chuan Wang | 2017-11-07 |
| 9696634 | Immersion lithography system using a sealed wafer bath | Ching-Yu Chang | 2017-07-04 |
| 9678434 | Grid refinement method | Wen-Chuan Wang, Jaw-Jung Shin, Pei-Yi Liu, Shy-Jay Lin | 2017-06-13 |
| 9594862 | Method of fabricating an integrated circuit with non-printable dummy features | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2017-03-14 |
| 9552964 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity | Jyuh-Fuh Lin, Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin | 2017-01-24 |
| 9529271 | Grid refinement method | Wen-Chuan Wang, Jaw-Jung Shin, Pei-Yi Liu, Shy-Jay Lin | 2016-12-27 |
| 9524939 | Multiple edge enabled patterning | Ming-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Tsong-Hua Ou, Ken-Hsien Hsieh | 2016-12-20 |
| 9519225 | Systems and methods for high-throughput and small-footprint scanning exposure for lithography | Shy-Jay Lin, Jaw-Jung Shin, Wen-Chuan Wang | 2016-12-13 |