Issued Patents All Time
Showing 1,326–1,350 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9443783 | 3DIC stacking device and method of manufacture | Jing-Cheng Lin | 2016-09-13 |
| 9443806 | Chip packages and methods of manufacturing the same | Shin-Puu Jeng, Cheng-Chieh Hsieh, Tsung-Shu Lin | 2016-09-13 |
| 9431369 | Antenna apparatus and method | Lai Wei Chih, Monsen Liu, En-Hsiang Yeh, Chuei-Tang Wang | 2016-08-30 |
| 9431342 | Staggered via redistribution layer (RDL) for a package and a method for forming the same | Chung-Shi Liu, Hung-Jui Kuo | 2016-08-30 |
| 9425136 | Conical-shaped or tier-shaped pillar connections | Tin-Hao Kuo, Chen-Shien Chen, Mirng-Ji Lii, Sheng-Yu Wu, Yao-Chun Chuang | 2016-08-23 |
| 9425128 | 3-D package having plurality of substrates | Chin-Chuan Chang, Jing-Cheng Lin | 2016-08-23 |
| 9425067 | Method for forming package systems having interposers | Yung-Chi Lin, Jing-Cheng Lin | 2016-08-23 |
| 9418961 | Apparatus and method of substrate to substrate bonding for three dimensional (3D) IC interconnects | Wen-Chih Chiou, Weng-Jin Wu | 2016-08-16 |
| 9418955 | Plasma treatment for semiconductor devices | Chen-Fa Lu, Chung-Shi Liu, Wei-Yu Chen, Cheng-Ting Chen | 2016-08-16 |
| 9418953 | Packaging through pre-formed metal pins | Chien Ling Hwang, Yeong-Jyh Lin | 2016-08-16 |
| 9418923 | Semiconductor component having through-silicon vias and method of manufacture | Cheng-Hung Chang, Ebin Liao, Chia-Lin Yu, Hsiang-Yi Wang, Chun Hua Chang +4 more | 2016-08-16 |
| 9418876 | Method of three dimensional integrated circuit assembly | Jing-Cheng Lin, Weng-Jin Wu, Shih-Ting Lin, Cheng-Lin Huang, Szu-Wei Lu +1 more | 2016-08-16 |
| 9418978 | Method of forming package-on-package (PoP) structure having a chip package with a plurality of dies attaching to first side of an interposer with a die formed thereon | Chung-Shi Liu, Mirng-Ji Lii, Ming-Da Cheng, Chih-Wei Lin | 2016-08-16 |
| 9418977 | Package-on-package semiconductor device | Der-Chyang Yeh | 2016-08-16 |
| 9412678 | Structure and method for 3D IC package | Shang-Yun Hou, Der-Chyang Yeh, Shin-Puu Jeng | 2016-08-09 |
| 9406648 | Power supply arrangement for semiconductor device | Chuei-Tang Wang, Monsen Liu, Sen-Kuei Hsu | 2016-08-02 |
| 9406776 | High temperature gate replacement process | Chung-Shi Liu | 2016-08-02 |
| 9401337 | Molding structure for wafer level package | Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng | 2016-07-26 |
| 9397056 | Semiconductor device having trench adjacent to receiving area and method of forming the same | Yen-Ping Wang, Chao-Wen Shih, Yung-Ping Chiang, Shih-Wei Liang, Tsung-Yuan Yu +2 more | 2016-07-19 |
| 9397137 | Interconnect structure for CIS flip-chip bonding and methods for forming the same | Yung Ching Chen, Chien-Hsun Lee, Mirng-Ji Lii | 2016-07-19 |
| 9397060 | Package on package structure | Mirng-Ji Lii, Hao-Yi Tsai, Hsien-Wei Chen, Kai-Chiang Wu | 2016-07-19 |
| 9396300 | Packaging methods for semiconductor devices, packaged semiconductor devices, and design methods thereof | Chuei-Tang Wang, Monsen Liu | 2016-07-19 |
| 9391350 | RF choke device for integrated circuits | Jeng-Shien Hsieh, Monsen Liu, Chung-Hao Tsai, Lai Wei Chih, Yeh En-Hsiang +1 more | 2016-07-12 |
| 9385091 | Reinforcement structure and method for controlling warpage of chip mounted on substrate | Shang-Yun Hou, Cheng-Chieh Hsieh, Tsung-Shu Lin | 2016-07-05 |
| 9379078 | 3D die stacking structure with fine pitches | Chen-Shien Chen, Yen-Chang Hu | 2016-06-28 |