Issued Patents All Time
Showing 1,301–1,325 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9508664 | Semiconductor device structure comprising a plurality of metal oxide fibers and method for forming the same | Jing-Cheng Lin, Szu-Wei Lu, Yen-Yao Chi | 2016-11-29 |
| 9508703 | Stacked dies with wire bonds and method | Ming-Fa Chen, Sung-Feng Yeh, Meng-Tse Chen, Hui-Min Huang, Hsiu-Jen Lin +2 more | 2016-11-29 |
| 9502394 | Package on-Package (PoP) structure including stud bulbs and method | Mirng-Ji Lii, Chung-Shi Liu, Ming-Da Cheng | 2016-11-22 |
| 9498851 | Methods for forming apparatus for stud bump formation | Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Yi-Li Hsiao, Chung-Shi Liu +1 more | 2016-11-22 |
| 9502271 | Warpage control for flexible substrates | Shih-Ting Lin, Jing-Cheng Lin, Shang-Yun Hou, Szu-Wei Lu | 2016-11-22 |
| 9502343 | Dummy metal with zigzagged edges | Cheng-Hsien Hsieh, Hsien-Wei Chen, Chi-Hsi Wu, Der-Chyang Yeh, Li-Han Hsu +1 more | 2016-11-22 |
| 9502386 | Fan-out package structure and methods for forming the same | Der-Chyang Yeh | 2016-11-22 |
| 9496196 | Packages and methods of manufacture thereof | Kuo-Chung Yee | 2016-11-15 |
| 9496189 | Stacked semiconductor devices and methods of forming same | Chien-Hsun Lee, Tsung-Ding Wang, Jung Wei Cheng | 2016-11-15 |
| 9484285 | Interconnect structures for wafer level package and methods of forming same | Meng-Tse Chen, Chih-Wei Lin, Hui-Min Huang, Ming-Da Cheng, Chung-Shi Liu | 2016-11-01 |
| 9475145 | Solder bump joint in a device including lamellar structures | Su-Chun Yang, Chung-Jung Wu, Hsiao-Yun Chen, Yi-Li Hsiao, Chih-Hang Tung +1 more | 2016-10-25 |
| 9478480 | Alignment mark and method of formation | Chen-Yu Tsai, Shih-Hui Wang, Chien-Ming Chiu, Chia-Ho Chen, Fang Wen Tsai +4 more | 2016-10-25 |
| 9472552 | CMOS devices having dual high-mobility channels | Ding-Yuan Chen | 2016-10-18 |
| D769009 | Seat | Philippe Erhel, Adrian Goring, Dorothee Redon | 2016-10-18 |
| 9460988 | Interconnect structures | Hai-Ching Chen, Tien-I Bao | 2016-10-04 |
| 9462692 | Test structure and method of testing electrical characteristics of through vias | Shang-Yun Hou, Wei-Cheng Wu, Hsien-Pin Hu, Jung Cheng Ko, Shin-Puu Jeng +1 more | 2016-10-04 |
| 9461025 | Electric magnetic shielding structure in packages | Shin-Puu Jeng, Der-Chyang Yeh, Hsien-Wei Chen, Jie Chen | 2016-10-04 |
| 9460939 | Package-on-package structures and methods of manufacture thereof | Pei-Hsuan Lee, Chien Ling Hwang, Chung-Shi Liu | 2016-10-04 |
| 9455236 | Integrated circuit packages and methods of forming same | Chien-Hsun Lee, Tsung-Ding Wang, Jung Wei Cheng | 2016-09-27 |
| 9455183 | Semiconductor device and bump formation process | Yi-Li Hsiao, Shin-Puu Jeng, Chih-Hang Tung, Cheng-Chang Wei | 2016-09-27 |
| 9449837 | 3D chip-on-wafer-on-substrate structure with via last process | Ming-Fa Chen, Wen-Ching Tsai | 2016-09-20 |
| 9449947 | Semiconductor package for thermal dissipation | Shin-Puu Jeng, Der-Chyang Yeh, Hsien-Wei Chen, Cheng-Chieh Hsieh, Ming-Yen Chiu | 2016-09-20 |
| 9449908 | Semiconductor package system and method | Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu | 2016-09-20 |
| 9443812 | Semiconductor device with post-passivation interconnect structure and method of forming the same | Hsien-Wei Chen, Tsung-Yuan Yu, Hao-Yi Tsai, Mirng-Ji Lii | 2016-09-13 |
| 9443814 | Bump structures for multi-chip packaging | Jing-Cheng Lin | 2016-09-13 |