Issued Patents All Time
Showing 1–25 of 181 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402358 | Thin film transistor including a compositionally-modulated active region and methods for forming the same | Wu-Wei Tsai, Po-Ting Lin, Chung-Te Lin | 2025-08-26 |
| 12402350 | Passivation structure for a thin film transistor | Wu-Wei Tsai | 2025-08-26 |
| 12381143 | Self-align via structure by selective deposition | Shao-Kuan Lee, Hsin-Yen Huang, Cheng-Chin Lee, Shau-Lin Shue | 2025-08-05 |
| 12376347 | Ferroelectric memory device and method of forming the same | Kuo-Chang Chiang, Yu-Chuan Shih, Chun-Chieh Lu, Po-Ting Lin, Sai-Hooi Yeong +2 more | 2025-07-29 |
| 12369354 | Thin film transistor including a compositionally- graded gate dielectric and methods for forming the same | Wu-Wei Tsai, Chun-Chieh Lu, Yu-Ming Lin, Sai-Hooi Yeong | 2025-07-22 |
| 12363912 | Ferroelectric memory device with a metal layer having a crystal orientation for improving ferroelectric polarization and method for forming the ferroelectric memory device | Yen-Chieh Huang, Chung-Te Lin | 2025-07-15 |
| 12363906 | 3D lateral patterning via selective deposition for ferroelectric devices | Song-Fu Liao, Kuo-Chang Chiang, Chung-Te Lin | 2025-07-15 |
| 12324161 | Annealed seed layer to improve ferroelectric properties of memory layer | Song-Fu Liao, Rainer Yen-Chieh Huang, Chung-Te Lin | 2025-06-03 |
| 12308286 | Interconnect structures including air gaps | Cheng-Chin Lee, Shao-Kuan Lee, Hsin-Yen Huang, Shau-Lin Shue | 2025-05-20 |
| 12308238 | Method and structure for semiconductor device having gate spacer protection layer | Chih Wei Lu, Chung-Ju Lee, Chien-Hua Huang, Tien-I Bao | 2025-05-20 |
| 12300486 | System and method of forming a porous low-k structure | Bo-Jiun Lin, Tien-I Bao | 2025-05-13 |
| 12289890 | Method of fabricating transistor structure | Song-Fu Liao, Kuo-Chang Chiang, Chung-Te Lin | 2025-04-29 |
| 12278143 | Method of providing a workpiece including low resistance interconnect low-resistance interconnect | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hsiang-Wei Liu, Tai-I Yang +2 more | 2025-04-15 |
| 12274070 | Semiconductor device and manufacturing method thereof | Po-Ting Lin, Wei-Chih Wen, Kai-Wen Cheng, Wu-Wei Tsai, Yu-Ming Hsiang +3 more | 2025-04-08 |
| 12238932 | Ferroelectric memory device, manufacturing method of the ferroelectric memory device and semiconductor chip | Rainer Yen-Chieh Huang, Yu-Ming Lin, Chung-Te Lin | 2025-02-25 |
| 12232329 | Stacked ferroelectric structure | Rainer Yen-Chieh Huang, Chung-Te Lin | 2025-02-18 |
| 12224352 | Transistor including an active region and methods for forming the same | Wu-Wei Tsai, Po-Ting Lin | 2025-02-11 |
| 12207474 | Stacked ferroelectric structure | Rainer Yen-Chieh Huang, Chung-Te Lin | 2025-01-21 |
| 12199188 | Thin film transistor including a compositionally-modulated active region and methods for forming the same | Wu-Wei Tsai, Sai-Hooi Yeong, Yu-Ming Lin | 2025-01-14 |
| 12176247 | Metal oxide composite as etch stop layer | Kai-Fang Cheng, Chi-Lin Teng, Hsin-Yen Huang | 2024-12-24 |
| 12176246 | Dielectric capping structure overlying a conductive structure to increase stability | Hsin-Yen Huang, Chi-Lin Teng, Shau-Lin Shue, Shao-Kuan Lee, Cheng-Chin Lee +1 more | 2024-12-24 |
| 12154965 | Carrier barrier layer for tuning a threshold voltage of a ferroelectric memory device | Rainer Yen-Chieh Huang, Yu-Ming Lin, Chung-Te Lin | 2024-11-26 |
| 12150309 | Double gate metal-ferroelectric-metal-insulator-semiconductor field-effect transistor (MFMIS-FET) structure | Yen-Chieh Huang, Po-Ting Lin, Song-Fu Liao, Sai-Hooi Yeong, Yu-Ming Lin +1 more | 2024-11-19 |
| 12144259 | Organic gate TFT-type stress sensors and method of making and using the same | Yen-Chieh Huang | 2024-11-12 |
| 12127411 | Cocktail layer over gate dielectric layer of FET FeRAM | Rainer Yen-Chieh Huang, Chung-Te Lin | 2024-10-22 |