Issued Patents All Time
Showing 1–25 of 365 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431386 | Semiconductor device having metallization layer with low capacitance and method for manufacturing the same | Cheng-Chin Lee, Ting-Ya Lo, Chi-Lin Teng, Cherng-Shiaw Tsai, Shao-Kuan Lee +4 more | 2025-09-30 |
| 12412804 | Semiconductor structure with improved heat dissipation | Cheng-Chin Lee, Shao-Kuan Lee, Hsiao-Kang Chang, Cherng-Shiaw Tsai, Kai-Fang Cheng +6 more | 2025-09-09 |
| 12412780 | Semiconductor device structure and methods of forming the same | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Ting-Ya Lo, Chi-Lin Teng +1 more | 2025-09-09 |
| 12394633 | Method of fabricating semiconductor device with reduced trench distortions | Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu +4 more | 2025-08-19 |
| 12381143 | Self-align via structure by selective deposition | Shao-Kuan Lee, Hsin-Yen Huang, Cheng-Chin Lee, Hai-Ching Chen | 2025-08-05 |
| 12381113 | Semiconductor device structure having air gap and methods of forming the same | Ting-Ya Lo, Cheng-Chin Lee, Shao-Kuan Lee, Chi-Lin Teng, Hsin-Yen Huang +1 more | 2025-08-05 |
| 12374637 | Semiconductor packages and methods for forming the same | Shin-Yi Yang, Ming-Han Lee | 2025-07-29 |
| 12362233 | Methods of performing chemical-mechanical polishing process in semiconductor devices | Shih-Kang Fu, Ming-Han Lee | 2025-07-15 |
| 12347776 | Integrated chip with graphene based interconnect | Shin-Yi Yang, Meng-Pei Lu, Chin-Lung Chung, Ming-Han Lee | 2025-07-01 |
| 12342600 | Titanium-containing diffusion barrier for CMP removal rate enhancement and contamination reduction | Shih-Kang Fu, Ming-Han Lee | 2025-06-24 |
| 12327760 | Interconnect structures having varied materials | Guanyu Luo, Shin-Yi Yang, Ming-Han Lee | 2025-06-10 |
| 12315811 | Graphene barrier layer for reduced contact resistance | Shin-Yi Yang, Ming-Han Lee | 2025-05-27 |
| 12308286 | Interconnect structures including air gaps | Cheng-Chin Lee, Shao-Kuan Lee, Hsin-Yen Huang, Hai-Ching Chen | 2025-05-20 |
| 12278143 | Method of providing a workpiece including low resistance interconnect low-resistance interconnect | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hsiang-Wei Liu, Tai-I Yang +2 more | 2025-04-15 |
| 12272597 | Semiconductor interconnection structures and methods of forming the same | Cheng-Chin Lee, Hsiao-Kang Chang, Hsin-Yen Huang, Cherng-Shiaw Tsai, Shao-Kuan Lee | 2025-04-08 |
| 12272623 | Semiconductor packages and methods for forming the same | Shin-Yi Yang, Ming-Han Lee | 2025-04-08 |
| 12266565 | Integrated chip with an etch-stop layer forming a cavity | Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai +1 more | 2025-04-01 |
| 12249555 | Semiconductor device package including a thermal conductive layer and methods of forming the same | Cheng-Chin Lee, Cherng-Shiaw Tsai, Shao-Kuan Lee, Hsiao-Kang Chang, Hsin-Yen Huang | 2025-03-11 |
| 12230537 | Semiconductor device structure having air gap and methods of forming the same | Ting-Ya Lo, Cheng-Chin Lee, Shao-Kuan Lee, Chi-Lin Teng, Hsin-Yen Huang +1 more | 2025-02-18 |
| 12230534 | Semiconductor device and method of manufacture | Tai-I Yang, Wei-Chen Chu, Yung-Chih Wang, Chia-Tien Wu, Hsin-Ping Chen | 2025-02-18 |
| 12218060 | Integrated chip with graphene based interconnect | Shin-Yi Yang, Meng-Pei Lu, Chin-Lung Chung, Ming-Han Lee | 2025-02-04 |
| 12211740 | Interconnect structure and methods of forming the same | Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee | 2025-01-28 |
| 12211788 | Hybrid interconnect structure for self aligned via | Shin-Yi Yang, Ming-Han Lee | 2025-01-28 |
| 12211799 | Semiconductor packages and methods for forming the same | Ming-Han Lee, Shin-Yi Yang | 2025-01-28 |
| 12205886 | Hybrid method for forming semiconductor interconnect structure | Shih-Kang Fu, Ming-Han Lee | 2025-01-21 |