Issued Patents All Time
Showing 1–25 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431431 | Conductive structure interconnects with downward projections | Tzu-Pei Chen, Chia-Hao Chang, Chia-Hung Chu, Po-Chin Chang, Shuen-Shin Liang +6 more | 2025-09-30 |
| 12417981 | Semiconductor device including graphene interconnect and method of making the semiconductor device | Shu-Wei Li, Yu-Chen Chan, Ming-Han Lee | 2025-09-16 |
| 12412837 | Interconnect structure including topological material | Meng-Pei Lu, Cian-Yu Chen, Yun-Chi Chiang, Ming-Han Lee | 2025-09-09 |
| 12374637 | Semiconductor packages and methods for forming the same | Shau-Lin Shue, Ming-Han Lee | 2025-07-29 |
| 12347776 | Integrated chip with graphene based interconnect | Meng-Pei Lu, Chin-Lung Chung, Ming-Han Lee, Shau-Lin Shue | 2025-07-01 |
| 12327760 | Interconnect structures having varied materials | Guanyu Luo, Ming-Han Lee, Shau-Lin Shue | 2025-06-10 |
| 12315811 | Graphene barrier layer for reduced contact resistance | Ming-Han Lee, Shau-Lin Shue | 2025-05-27 |
| 12300599 | Method for forming semiconductor structure | Meng-Pei Lu, Shu-Wei Li, Chin-Lung Chung, Ming-Han Lee | 2025-05-13 |
| 12272623 | Semiconductor packages and methods for forming the same | Ming-Han Lee, Shau-Lin Shue | 2025-04-08 |
| 12218060 | Integrated chip with graphene based interconnect | Meng-Pei Lu, Chin-Lung Chung, Ming-Han Lee, Shau-Lin Shue | 2025-02-04 |
| 12211799 | Semiconductor packages and methods for forming the same | Ming-Han Lee, Shau-Lin Shue | 2025-01-28 |
| 12211788 | Hybrid interconnect structure for self aligned via | Ming-Han Lee, Shau-Lin Shue | 2025-01-28 |
| 12211740 | Interconnect structure and methods of forming the same | Shu-Wei Li, Yu-Chen Chan, Ming-Han Lee, Shau-Lin Shue | 2025-01-28 |
| 12166026 | Semiconductor packages and methods for forming the same | Han-Tang Hung, Ming-Han Lee, Shau-Lin Shue | 2024-12-10 |
| 12159814 | Semiconductor packages and methods for forming the same | Ming-Han Lee, Shau-Lin Shue | 2024-12-03 |
| 12142557 | Integrated chip having a back-side power rail | Ming-Han Lee, Shau-Lin Shue | 2024-11-12 |
| 12113021 | Graphene-assisted low-resistance interconnect structures and methods of formation thereof | Yu-Chen Chan, Ming-Han Lee, Hai-Ching Chen, Shau-Lin Shue | 2024-10-08 |
| 12094848 | Semiconductor packages and methods for forming the same | Ming-Han Lee, Shau-Lin Shue | 2024-09-17 |
| 12080593 | Barrier-less structures | Hsin-Ping Chen, Ming-Han Lee, Yung-Hsu Wu, Chia-Tien Wu, Shau-Lin Shue +1 more | 2024-09-03 |
| 12068254 | Interconnection structure and methods of forming the same | Shu-Wei Li, Yu-Chen Chan, Ming-Han Lee, Shau-Lin Shue | 2024-08-20 |
| 12068253 | Semiconductor structure with two-dimensional conductive structures | Shu-Wei Li, Yu-Chen Chan, Meng-Pei Lu, Ming-Han Lee | 2024-08-20 |
| 12062612 | Semiconductor device structure and methods of forming the same | Shu-Wei Li, Guanyu Luo, Ming-Han Lee | 2024-08-13 |
| 12051643 | Hybrid via interconnect structure | Chin-Lung Chung, Ming-Han Lee | 2024-07-30 |
| 12051683 | Semiconductor packages and methods for forming the same | Han-Tang Hung, Ming-Han Lee, Shau-Lin Shue | 2024-07-30 |
| 12051645 | Two 2D capping layers on interconnect conductive structure to increase interconnect structure reliability | Shu-Wei Li, Yu-Chen Chan, Ming-Han Lee | 2024-07-30 |