Issued Patents All Time
Showing 1–25 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417980 | First metal structure, layout, and method | Chi-Yu Lu, Chih-Liang Chen, Chih-Yu Lai, Shang-Hsuan CHIU | 2025-09-16 |
| 12412804 | Semiconductor structure with improved heat dissipation | Cheng-Chin Lee, Shau-Lin Shue, Shao-Kuan Lee, Hsiao-Kang Chang, Cherng-Shiaw Tsai +6 more | 2025-09-09 |
| 12400964 | Integrated circuit | Shih-Wei Peng, Jiann-Tyng Tzeng | 2025-08-26 |
| 12394633 | Method of fabricating semiconductor device with reduced trench distortions | Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Ta-Ching Yu, Kuei-Shun Chen +4 more | 2025-08-19 |
| 12388016 | Deep lines and shallow lines in signal conducting paths | Wei-An Lai, Te-Hsin Chiu, Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-08-12 |
| 12388009 | Semiconductor device including structure connecting frontside and backside metal and method of manufacturing the same | Wei-Cheng Lin | 2025-08-12 |
| 12381145 | Signal conducting line arrangements in integrated circuits | Wei Ling Chang, Chih-Liang Chen, Guo-Huei Wu | 2025-08-05 |
| 12368106 | Diagonal vias in semiconductor structures | Shih-Wei Peng, Jiann-Tyng Tzeng | 2025-07-22 |
| 12300623 | Integrated circuit | Shih-Wei Peng, Jiann-Tyng Tzeng | 2025-05-13 |
| 12283477 | Method of manufacturing a semiconductor device | Shih-Wei Peng, Jiann-Tyng Tzeng | 2025-04-22 |
| 12283586 | Integrated circuit device, method and system | Wei Ling Chang, Chih-Liang Chen, Hui-Zhong Zhuang, Jia-Hong GAO | 2025-04-22 |
| 12278143 | Method of providing a workpiece including low resistance interconnect low-resistance interconnect | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hsiang-Wei Liu, Tai-I Yang +2 more | 2025-04-15 |
| 12230534 | Semiconductor device and method of manufacture | Tai-I Yang, Wei-Chen Chu, Yung-Chih Wang, Hsin-Ping Chen, Shau-Lin Shue | 2025-02-18 |
| 12183671 | Hybrid metal line structure | Pokuan Ho, Hsin-Ping Chen, Wei-Chen Chu | 2024-12-31 |
| 12125795 | Integrated chip with inter-wire cavities | Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao +2 more | 2024-10-22 |
| 12094816 | Semiconductor structure having deep metal line and method for forming the semiconductor structure | Wei-Chen Chu, Chia-Wei Su, Yu-Chieh Liao, Chia-Chen Lee, Hsin-Ping Chen +1 more | 2024-09-17 |
| 12080593 | Barrier-less structures | Hsin-Ping Chen, Ming-Han Lee, Shin-Yi Yang, Yung-Hsu Wu, Shau-Lin Shue +1 more | 2024-09-03 |
| 12062652 | Zero mask high density capacitor | Chung-Hui Chen, Wan-Te Chen, Cheng-Hsiang Hsieh | 2024-08-13 |
| 12058852 | Semiconductor device and method of operating the same | Hsiang-Wei Liu, Wei-Chen Chu | 2024-08-06 |
| 12002709 | Interconnect structure and manufacturing method for the same | Hsiang-Wei Liu, Wei-Chen Chu, Tai-I Yang | 2024-06-04 |
| 11984359 | Semiconductor device with spacers for self aligned vias | Pokuan Ho, Hsin-Ping Chen | 2024-05-14 |
| 11984355 | Method for manufacturing an interconnection structure having a bottom via spacer | Po-Kuan HO | 2024-05-14 |
| 11967560 | Integrated circuit | Shih-Wei Peng, Jiann-Tyng Tzeng | 2024-04-23 |
| 11923306 | Semiconductor structure having air gaps and method for manufacturing the same | Chia-Wei Su, Hsin-Ping Chen, Shau-Lin Shue | 2024-03-05 |
| 11923273 | Method of manufacturing a semiconductor device | Shih-Wei Peng, Jiann-Tyng Tzeng | 2024-03-05 |