Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12300600 | Semiconductor device with self-aligned conductive features | Tai-I Yang, Yung-Hsu Wu, Chung-Ju Lee | 2025-05-13 |
| 12230534 | Semiconductor device and method of manufacture | Tai-I Yang, Yung-Chih Wang, Chia-Tien Wu, Hsin-Ping Chen, Shau-Lin Shue | 2025-02-18 |
| 12183671 | Hybrid metal line structure | Pokuan Ho, Chia-Tien Wu, Hsin-Ping Chen | 2024-12-31 |
| 12094816 | Semiconductor structure having deep metal line and method for forming the semiconductor structure | Chia-Tien Wu, Chia-Wei Su, Yu-Chieh Liao, Chia-Chen Lee, Hsin-Ping Chen +1 more | 2024-09-17 |
| 12058852 | Semiconductor device and method of operating the same | Hsiang-Wei Liu, Chia-Tien Wu | 2024-08-06 |
| 12002709 | Interconnect structure and manufacturing method for the same | Hsiang-Wei Liu, Chia-Tien Wu, Tai-I Yang | 2024-06-04 |
| 11860550 | Multi-metal fill with self-aligned patterning and dielectric with voids | Tai-I Yang, Hsiang-Wei Liu, Shau-Lin Shue, Li-Lin Su, Yung-Hsu Wu | 2024-01-02 |
| 11764106 | Semiconductor device and method of manufacture | Tai-I Yang, Yung-Chih Wang, Chia-Tien Wu, Hsin-Ping Chen, Shau-Lin Shue | 2023-09-19 |
| 11729969 | Semiconductor device and method of operating the same | Hsiang-Wei Liu, Chia-Tien Wu | 2023-08-15 |
| 11682618 | Hybrid metal line structure | Pokuan Ho, Chia-Tien Wu, Hsin-Ping Chen | 2023-06-20 |
| 11422475 | Multi-metal fill with self-aligned patterning and dielectric with voids | Tai-I Yang, Hsiang-Wei Liu, Shau-Lin Shue, Li-Lin Su, Yung-Hsu Wu | 2022-08-23 |
| 11404367 | Method for forming semiconductor device with self-aligned conductive features | Tai-I Yang, Yung-Hsu Wu, Chung-Ju Lee | 2022-08-02 |
| 11183422 | Semiconductor structure and method for manufacturing the same | Tai-I Yang, Hsin-Ping Chen, Chih Wei Lu, Chung-Ju Lee | 2021-11-23 |
| 11107725 | Interconnect structure and manufacturing method for the same | Hsiang-Wei Liu, Chia-Tien Wu, Tai-I Yang | 2021-08-31 |
| 11088020 | Structure and formation method of interconnection structure of semiconductor device | Tai-I Yang, Li-Lin Su, Shin-Yi Yang, Cheng-Chi Chuang, Hsin-Ping Chen | 2021-08-10 |
| 10991618 | Semiconductor device and method of manufacture | Tai-I Yang, Yung-Chih Wang, Chia-Tien Wu, Hsin-Ping Chen, Shau-Lin Shue | 2021-04-27 |
| 10957580 | Metal routing with flexible space formed using self-aligned spacer patterning | Hsiang-Wei Liu, Chia-Tien Wu | 2021-03-23 |
| 10818596 | Method for forming semiconductor device structure with graphene layer | Tai-I Yang, Tien-I Bao, Tien-Lu Lin | 2020-10-27 |
| 10804143 | Semiconductor structure and method for manufacturing the same | Tai-I Yang, Hsin-Ping Chen, Chih Wei Lu, Chung-Ju Lee | 2020-10-13 |
| 10784151 | Interconnect structure and manufacturing method for the same | Hsiang-Wei Liu, Chia-Tien Wu, Tai-I Yang | 2020-09-22 |
| 10784155 | Multi-metal fill with self-align patterning | Tai-I Yang, Cheng-Chi Chuang, Chia-Tien Wu | 2020-09-22 |
| 10734275 | Metal routing with flexible space formed using self-aligned spacer patterning | Hsiang-Wei Liu, Chia-Tien Wu | 2020-08-04 |
| 10714421 | Structure and formation method of semiconductor device with self-aligned conductive features | Tai-I Yang, Yung-Hsu Wu, Chung-Ju Lee | 2020-07-14 |
| 10534273 | Multi-metal fill with self-aligned patterning and dielectric with voids | Tai-I Yang, Hsiang-Wei Liu, Shau-Lin Shue, Li-Lin Su, Yung-Hsu Wu | 2020-01-14 |
| 10535560 | Interconnection structure of semiconductor device | Hsiang-Wei Liu, Tai-I Yang, Chia-Tien Wu | 2020-01-14 |