HY

Hsin-Chieh Yao

TSMC: 50 patents #650 of 12,232Top 6%
Overall (All Time): #53,552 of 4,157,543Top 2%
50
Patents All Time

Issued Patents All Time

Showing 1–25 of 50 patents

Patent #TitleCo-InventorsDate
12424488 Dual etch-stop layer structure Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2025-09-23
12406924 Interconnection structure and methods of forming the same Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2025-09-02
12362231 Self-assembled dielectric on metal rie lines to increase reliability Wei-Hao Liao, Hsi-Wen Tien, Chih Wei Lu, Yu-Teng Dai, Chung-Ju Lee 2025-07-15
12322723 Self-aligned interconnect structure Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao 2025-06-03
12315817 Dielectric on wire structure to increase processing window for overlying via Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao 2025-05-27
12300541 Structure and formation method of semiconductor device with carbon-containing conductive structure Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Hwei-Jay CHU 2025-05-13
12300611 Interconnect conductive structure comprising two conductive materials Yu-Teng Dai, Hsi-Wen Tien, Wei-Hao Liao, Chih Wei Lu, Chung-Ju Lee 2025-05-13
12266565 Integrated chip with an etch-stop layer forming a cavity Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Shau-Lin Shue, Yu-Teng Dai +1 more 2025-04-01
12243775 Double patterning approach by direct metal etch Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2025-03-04
12125795 Integrated chip with inter-wire cavities Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai +2 more 2024-10-22
12094823 Interconnection structure and methods of forming the same Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2024-09-17
11972975 Semiconductor device structure having air gap and method for forming the same Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee +1 more 2024-04-30
11942364 Selective deposition of a protective layer to reduce interconnect structure critical dimensions Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Yu-Teng Dai, Wei-Hao Liao 2024-03-26
11923293 Barrier structure on interconnect wire to increase processing window for overlying via Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai 2024-03-05
11854965 Sidewall spacer structure enclosing conductive wire sidewalls to increase reliability Yu-Teng Dai, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao 2023-12-26
11842966 Integrated chip with inter-wire cavities Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai +2 more 2023-12-12
11842924 Dual etch-stop layer structure Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2023-12-12
11798910 Self-aligned interconnect structure Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao 2023-10-24
11798840 Self-assembled dielectric on metal RIE lines to increase reliability Wei-Hao Liao, Hsi-Wen Tien, Chih Wei Lu, Yu-Teng Dai, Chung-Ju Lee 2023-10-24
11756884 Interconnection structure and methods of forming the same Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2023-09-12
11688782 Semiconductor structure and method for forming the same Wei-Hao Liao, Hsi-Wen Tien, Chih Wei Lu, Yu-Teng Dai, Chung-Ju Lee 2023-06-27
11676862 Semiconductor device structure and methods of forming the same Hwei-Jay CHU, Chieh-Han Wu, Cheng-Hsiung Tsai, Chung-Ju Lee 2023-06-13
11652054 Dielectric on wire structure to increase processing window for overlying via Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao 2023-05-16
11569127 Double patterning approach by direct metal etch Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Chih Wei Lu, Chung-Ju Lee 2023-01-31
11521896 Selective deposition of a protective layer to reduce interconnect structure critical dimensions Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Yu-Teng Dai, Wei-Hao Liao 2022-12-06