Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12021066 | Buffer layer(s) on a stacked structure having a via | Cheng-Yuan Tsai, Yeur-Luen Tu, Chia-Shiung Tsai | 2024-06-25 |
| 11670584 | Semiconductor structure with ultra thick metal and manufacturing method thereof | Cheng-Yuan Tsai, Ching-Chung Hsu, Chung-Long Chang | 2023-06-06 |
| 11270978 | Buffer layer(s) on a stacked structure having a via | Cheng-Yuan Tsai, Yeur-Luen Tu, Chia-Shiung Tsai | 2022-03-08 |
| 11114378 | Semiconductor structure with ultra thick metal and manufacturing method thereof | Cheng-Yuan Tsai, Ching-Chung Hsu, Chung-Long Chang | 2021-09-07 |
| 10665456 | Semiconductor structure | Shih Pei Chou, Jiech-Fun Lu, Yeur-Luen Tu, Chia-Shiung Tsai | 2020-05-26 |
| 10534353 | System and method to reduce pre-back-grinding process defects | Cheng-Ting Chen, James Hu, Chung-Shi Liu | 2020-01-14 |
| 10510723 | Buffer layer(s) on a stacked structure having a via | Cheng-Yuan Tsai, Yeur-Luen Tu, Chia-Shiung Tsai | 2019-12-17 |
| 10269701 | Semiconductor structure with ultra thick metal and manufacturing method thereof | Cheng-Yuan Tsai, Ching-Chung Hsu, Chung-Long Chang | 2019-04-23 |
| 10134645 | Stress monitoring device and method of manufacturing the same | Cheng-Yuan Tsai | 2018-11-20 |
| 10128113 | Semiconductor structure and manufacturing method thereof | Shih Pei Chou, Jiech-Fun Lu, Yeur-Luen Tu, Chia-Shiung Tsai | 2018-11-13 |
| 9793243 | Buffer layer(s) on a stacked structure having a via | Cheng-Yuan Tsai, Yeur-Luen Tu, Chia-Shiung Tsai | 2017-10-17 |
| 9508659 | Method and apparatus to protect a wafer edge | Yeur-Luen Tu, Shu-Ju Tsai, Cheng-Ta Wu, Chia-Shiung Tsai, Xiaomeng Chen | 2016-11-29 |
| 9418955 | Plasma treatment for semiconductor devices | Chung-Shi Liu, Chen-Hua Yu, Wei-Yu Chen, Cheng-Ting Chen | 2016-08-16 |
| 8716858 | Bump structure with barrier layer on post-passivation interconnect | Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu | 2014-05-06 |
| 8710458 | UV exposure method for reducing residue in de-taping process | Yu-Hsiang Hu, Chung-Shi Liu | 2014-04-29 |
| 8636559 | Method for wafer back-grinding control | Chiang-Hao Lee, Wei-Yu Chen, Chung-Shi Liu | 2014-01-28 |
| 8629053 | Plasma treatment for semiconductor devices | Chung-Shi Liu, Chen-Hua Yu, Wei-Yu Chen, Cheng-Ting Chen | 2014-01-14 |
| 8571699 | System and method to reduce pre-back-grinding process defects | Cheng-Ting Chen, James Hu, Chung-Shi Liu | 2013-10-29 |
| 8298041 | System and method for wafer back-grinding control | Chiang-Hao Lee, Wei-Yu Chen, Chung-Shi Liu | 2012-10-30 |
| 6555477 | Method for preventing Cu CMP corrosion | Chin-Hsiung Ho, Mei-Ling Chen, Liang-Kun Huang | 2003-04-29 |
| 6524959 | Chemical mechanical polish (CMP) planarizing method employing derivative signal end-point monitoring and control | Chen-Peng Fan, Jui-Ping Chuang, Tien-Chen Hu | 2003-02-25 |
| 6517413 | Method for a copper CMP endpoint detection system | Tien-Chen Hu, Jin-Churng Twu | 2003-02-11 |