Issued Patents All Time
Showing 1–25 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424577 | Isolation structure for bond pad structure | Sin-Yao Huang, Jeng-Shyan Lin, Tzu-Hsuan Hsu | 2025-09-23 |
| 12419124 | Method for forming light pipe structure with high quantum efficiency | Tsun-Kai Tsao, Jiech-Fun Lu, Tzu-Ming Wang | 2025-09-16 |
| 12400984 | Isolation structure for bond pad structure | Sin-Yao Huang, Jeng-Shyan Lin, Tzu-Hsuan Hsu | 2025-08-26 |
| 12341115 | Bond pad structure with reduced step height and increased electrical isolation | Jiech-Fun Lu | 2025-06-24 |
| 12317613 | Self aligned grids in BSI image sensor | Tsun-Kai Tsao, Jiech-Fun Lu, Wei Chuang Wu | 2025-05-27 |
| 12165911 | Method for forming a semiconductor-on-insulator (SOI) substrate | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Yu-Hung Cheng +1 more | 2024-12-10 |
| 12087801 | Deep trench isolations and methods of forming the same | Cheng-Hsien Chou, Chih-Yu Lai, Yen-Ting Chiang, Hsiao-Hui Tseng, Min-Ying Tsai | 2024-09-10 |
| 11915977 | Interconnect structure for stacked device | Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung +3 more | 2024-02-27 |
| 11894410 | Bond pad structure for bonding improvement | Sin-Yao Huang, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung, Ming-Tsong Wang | 2024-02-06 |
| 11855159 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Yu-Hung Cheng +1 more | 2023-12-26 |
| 11830764 | Method for forming a semiconductor-on-insulator (SOI) substrate | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Yu-Hung Cheng +1 more | 2023-11-28 |
| 11776985 | Method of forming self aligned grids in BSI image sensor | Tsun-Kai Tsao, Jiech-Fun Lu, Wei Chuang Wu | 2023-10-03 |
| 11769778 | Method for forming light pipe structure with high quantum efficiency | Tsun-Kai Tsao, Jiech-Fun Lu, Tzu-Ming Wang | 2023-09-26 |
| 11694979 | Isolation structure for bond pad structure | Sin-Yao Huang, Jeng-Shyan Lin, Tzu-Hsuan Hsu | 2023-07-04 |
| 11522004 | Absorption enhancement structure for image sensor | Ching-Chung Su, Hung-Wen Hsu, Jiech-Fun Lu | 2022-12-06 |
| 11495489 | Method for forming a semiconductor-on-insulator (SOI) substrate | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Yu-Hung Cheng +1 more | 2022-11-08 |
| 11309342 | Dummy vertical transistor structure to reduce cross talk in pixel sensor | Tsun-Kai Tsao, Jiech-Fun Lu | 2022-04-19 |
| 11264469 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Yu-Hung Cheng +1 more | 2022-03-01 |
| 11244981 | Bond pad structure for bonding improvement | Sin-Yao Huang, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung, Ming-Tsong Wang | 2022-02-08 |
| 11217621 | Deep trench isolations and methods of forming the same | Cheng-Hsien Chou, Chih-Yu Lai, Yen-Ting Chiang, Hsiao-Hui Tseng, Min-Ying Tsai | 2022-01-04 |
| 11217547 | Bond pad structure with reduced step height and increased electrical isolation | Jiech-Fun Lu | 2022-01-04 |
| 11189583 | Semiconductor structure and manufacturing method thereof | Sheng-Chau Chen, Ming-Che Lee, Kuo-Ming Wu, Cheng-Hsien Chou, Cheng-Yuan Tsai +1 more | 2021-11-30 |
| 11121162 | Light pipe structure with high quantum efficiency | Tsun-Kai Tsao, Jiech-Fun Lu, Tzu-Ming Wang | 2021-09-14 |
| 11049797 | Method for manufacturing a semiconductor structure comprising a semiconductor device layer formed on a tem, porary substrate having a graded SiGe etch stop layer therebetween | Yu-Hung Cheng, Yeur-Luen Tu, Alexander Kalnitsky, Tung-I Lin, Wei-Li Chen | 2021-06-29 |
| 11031434 | Self aligned grids in BSI image sensor | Tsun-Kai Tsao, Jiech-Fun Lu, Wei Chuang Wu | 2021-06-08 |