Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11610808 | Semiconductor wafer with low defect count and method for manufacturing thereof | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Ching-Pei Su | 2023-03-21 |
| 11049797 | Method for manufacturing a semiconductor structure comprising a semiconductor device layer formed on a tem, porary substrate having a graded SiGe etch stop layer therebetween | Yu-Hung Cheng, Shih Pei Chou, Yeur-Luen Tu, Alexander Kalnitsky, Wei-Li Chen | 2021-06-29 |
| 10971406 | Method of forming source/drain regions of transistors | Yu-Hung Cheng, Ching-Wei Tsai, Yeur-Luen Tu, Wei-Li Chen | 2021-04-06 |
| 10453757 | Transistor channel | Yu-Hung Cheng, Ching-Wei Tsai, Yeur-Luen Tu, Wei-Li Chen | 2019-10-22 |
| 10269864 | Pixel isolation device and fabrication method | Yu-Hung Cheng, Wei-Li Chen, Yeur-Luen Tu | 2019-04-23 |
| 10147756 | Deep trench isolation structure and method of forming same | Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Lung Wu, Wei-Li Chen | 2018-12-04 |
| 9978650 | Transistor channel | Yu-Hung Cheng, Ching-Wei Tsai, Yeur-Luen Tu, Wei-Li Chen | 2018-05-22 |
| 9905600 | Image sensor device and manufacturing method thereof | Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Lung Wu | 2018-02-27 |
| 9899441 | Deep trench isolation (DTI) structure with a tri-layer passivation layer | Yu-Hung Cheng, Cheng-Lung Wu, Yeur-Luen Tu | 2018-02-20 |
| 9887235 | Pixel isolation device and fabrication method | Yu-Hung Cheng, Wei-Li Chen, Yeur-Luen Tu | 2018-02-06 |
| 9799702 | Deep trench isolation structure and method of forming same | Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Lung Wu, Wei-Li Chen | 2017-10-24 |
| 9634096 | Semiconductor device with trench isolation | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2017-04-25 |
| 9595589 | Transistor with performance boost by epitaxial layer | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2017-03-14 |
| 9349768 | CMOS image sensor with epitaxial passivation layer | Yu-Hung Cheng, Tung-Hsiung Tseng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai +4 more | 2016-05-24 |
| 9245974 | Performance boost by silicon epitaxy | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2016-01-26 |
| 9099324 | Semiconductor device with trench isolation | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2015-08-04 |