KD

Kristof Darmawikarta

IN Intel: 95 patents #223 of 30,777Top 1%
SH Santa Clara Holdings: 1 patents #1 of 24Top 5%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Chandler, AZ: #22 of 3,331 inventorsTop 1%
🗺 Arizona: #134 of 32,909 inventorsTop 1%
Overall (All Time): #15,004 of 4,157,543Top 1%
98
Patents All Time

Issued Patents All Time

Showing 51–75 of 98 patents

Patent #TitleCo-InventorsDate
11508662 Device and method of very high density routing used with embedded multi-die interconnect bridge Robert Alan May, Wei-Lun Kane Jen, Jonathan L. Rosch, Islam A. Salama 2022-11-22
11495552 Substrate integrated thin film capacitors using amorphous high-k dielectrics Aleksandar Aleksov, Thomas L. Sounart, Henning Braunisch, Prithwish Chatterjee, Andrew J. Brown 2022-11-08
11443885 Thin film barrier seed metallization in magnetic-plugged through hole inductor Srinivas V. Pietambaram, Sandeep Gaan, Sri Ranga Sai Boyapati, Prithwish Chatterjee, Sameer Paital +2 more 2022-09-13
11430740 Microelectronic device with embedded die substrate on interposer Robert Alan May, Islam A. Salama, Sri Ranga Sai Boyapati, Sheng Li, Robert L. Sankman +1 more 2022-08-30
11404389 In-situ component fabrication of a highly efficient, high inductance air core inductor integrated into substrate packages Jeremy Ecton, Suddhasattwa Nad, Yonggang Li, Xiaoying Guo 2022-08-02
11393766 Multi-chip package with high density interconnects Aleksandar Aleksov, Adel A. Elsherbini, Robert Alan May, Sri Ranga Sai Boyapati 2022-07-19
11380472 High-permeability magnetic-dielectric film-based inductors Srinivas V. Pietambaram, Rahul N. Manepalli 2022-07-05
11348718 Substrate embedded magnetic core inductors and method of making Srinivas V. Pietambaram, Gang Duan, Yonggang Li, Sameer Paital 2022-05-31
11322444 Lithographic cavity formation to enable EMIB bump pitch scaling Hiroki Tanaka, Robert Alan May, Sameer Paital, Bai Nie, Jesse C. Jones +1 more 2022-05-03
11309239 Electromigration resistant and profile consistent contact arrays Srinivas V. Pietambaram, Jung Kyu Han, Ali Lehaf, Steve Cho, Thomas HEATON +3 more 2022-04-19
11309192 Integrated circuit package supports Robert Alan May, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram, Chung Kwang Christopher Tan, Aleksandar Aleksov 2022-04-19
11272619 Apparatus with embedded fine line space in a cavity, and a method for forming the same Robert Alan May, Yikang Deng, Ji-Yong Park, Maroun D. Moussallem, Amruthavalli Pallavi Alur +2 more 2022-03-08
11264346 Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging Sri Ranga Sai Boyapati, Hiroki Tanaka, Robert Alan May 2022-03-01
11264239 Polarization defined zero misalignment vias for semiconductor packaging Hiroki Tanaka, Aleksandar Aleksov, Sri Ranga Sai Boyapati, Robert Alan May 2022-03-01
11264307 Dual-damascene zero-misalignment-via process for semiconductor packaging Aleksandar Aleksov, Hiroki Tanaka, Robert Alan May, Changhua Liu, Chung Kwang Christopher Tan +2 more 2022-03-01
11257745 Electroless metal-defined thin pad first level interconnects for lithographically defined vias Aleksandar Aleksov, Veronica Strong, Arnab Sarkar 2022-02-22
11244912 Semiconductor package having a coaxial first layer interconnect Sai Vadlamani, Aleksandar Aleksov, Rahul Jain, Kyu Oh Lee, Robert Alan May +2 more 2022-02-08
11227849 Electroless-catalyst doped-mold materials for integrated-circuit die packaging architectures Brandon C. Marin, Srinivas V. Pietambaram, Gang Duan, Sameer Paital 2022-01-18
11211345 In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same Aleksandar Aleksov, Telesphor Kamgaing, Sri Ranga Sai Boyapati, Eyal Fayneh, Ofir Degani +2 more 2021-12-28
11164818 Inorganic-based embedded-die layers for modular semiconductive devices Srinivas V. Pietambaram, Tarek A. Ibrahim, Rahul N. Manepalli, Debendra Mallik, Robert L. Sankman 2021-11-02
11107781 RFIC having coaxial interconnect and molded layer Srinivas V. Pietambaram, Rahul N. Manepalli, Robert Alan May, Aleksandar Aleksov, Telesphor Kamgaing 2021-08-31
11101222 Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers Srinivas V. Pietambaram, Sri Ranga Sai Boyapati, Robert Alan May, Javier Soto Gonzalez, Kwangmo Chris Lim 2021-08-24
11081768 Fabricating an RF filter on a semiconductor package using selective seeding Brandon C. Marin, Jeremy Ecton, Aleksandar Aleksov, Yonggang Li, Dilan Seneviratne 2021-08-03
11075130 Package substrate having polymer-derived ceramic core Lisa Ying Ying Chen, Lauren A. Link, Robert Alan May, Amruthavalli Pallavi Alur, Siddharth K. Alur +3 more 2021-07-27
11069620 Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate Robert Alan May, Sri Ranga Sai Boyapati 2021-07-20