Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Lauren A. Link — 17 Patents

Intel: 17 patents #2,442 of 30,777Top 8%
Mesa, AZ: #131 of 2,463 inventorsTop 6%
Arizona: #2,045 of 32,909 inventorsTop 7%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Lauren A. Link has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2020 and the most recent in January 2024. Lauren A. Link ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Lauren A. Link in Mesa, AZ, US.

Patents per Year

Patents granted per year, 2020 to 2024Bar chart with a peak of 6 patents in 2023.peak 62020: 2 patents20202021: 3 patents20212022: 4 patents20222023: 6 patents20232024: 2 patents2024

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11881463 Coreless organic packages with embedded die and magnetic inductor structures Andrew J. Brown, Rahul Jain, Prithwish Chatterjee, Sai Vadlamani 2024-01-23 $52,361,000
11862552 Methods of embedding magnetic structures in substrates Sai Vadlamani, Prithwish Chatterjee, Robert Alan May, Rahul Jain, Andrew J. Brown +2 more 2024-01-02 $30,016,000
11824013 Package substrate with reduced interconnect stress Andrew J. Brown, Sheng Li, Sandeep B. Sane 2023-11-21 $28,968,000
11705389 Vias for package substrates Andrew J. Brown, Luke Garner, Liwei Cheng, Cheng Xu, Ying Wang +2 more 2023-07-18 $21,060,000
11651902 Patterning of thin film capacitors in organic substrate packages Rahul Jain, Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani 2023-05-16 $11,130,000
11610706 Release layer-assisted selective embedding of magnetic material in cored and coreless organic substrates Sai Vadlamani, Prithwish Chatterjee, Rahul Jain, Kyu Oh Lee, Sheng Li +1 more 2023-03-21 $20,076,000
11574874 Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch Robert Alan May, Sri Ranga Sai Boyapati, Kristof Darmawikarta, Hiroki Tanaka, Srinivas V. Pietambaram +4 more 2023-02-07 $11,877,000
11552008 Asymmetric cored integrated circuit package supports Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani, Ying Wang, Chong Zhang 2023-01-10 $14,061,000
11444042 Magnetic structures in integrated circuit packages Andrew J. Brown, Ying Wang, Chong Zhang, Yikang Deng 2022-09-13 $14,653,000
11335632 Magnetic inductor structures for package devices Prithwish Chatterjee, Junnan Zhao, Sai Vadlamani, Ying Wang, Rahul Jain +3 more 2022-05-17 $14,251,000
11289263 Electronic substrates having embedded magnetic material using photo-imagable dielectric layers Sai Vadlamani, Prithwish Chatterjee, Andrew J. Brown 2022-03-29 $28,068,000
11251113 Methods of embedding magnetic structures in substrates Sai Vadlamani, Prithwish Chatterjee, Robert Alan May, Rahul Jain, Andrew J. Brown +2 more 2022-02-15 $14,138,000
11205626 Coreless organic packages with embedded die and magnetic inductor structures Andrew J. Brown, Rahul Jain, Prithwish Chatterjee, Sai Vadlamani 2021-12-21 $33,282,000
11189409 Electronic substrates having embedded dielectric magnetic material to form inductors Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani 2021-11-30 $30,212,000
11075130 Package substrate having polymer-derived ceramic core Lisa Ying Ying Chen, Robert Alan May, Amruthavalli Pallavi Alur, Kristof Darmawikarta, Siddharth K. Alur +3 more 2021-07-27 $27,337,000
10741947 Plated through hole socketing coupled to a solder ball to engage with a pin Amruthavalli Pallavi Alur, Siddharth K. Alur, Liwei Cheng, Jonathan L. Rosch, Sai Vadlamani +1 more 2020-08-11 $37,011,000
10700021 Coreless organic packages with embedded die and magnetic inductor structures Andrew J. Brown, Rahul Jain, Prithwish Chatterjee, Sai Vadlamani 2020-06-30 $33,333,000