Jonathan L. Rosch — 9 Patents at Intel

Jonathan L. Rosch has been granted 9 US patents while listed as an inventor at Intel. The first was granted in 2020 and the most recent in July 2024. Jonathan L. Rosch ranks #535,341 of 4,157,543 US inventors in our database (top 12.9%). Patent records list Jonathan L. Rosch in Mesa, AZ, US.

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12040276	Device and method of very high density routing used with embedded multi-die interconnect bridge	Robert Alan May, Wei-Lun Kane Jen, Islam A. Salama, Kristof Darmawikarta	2024-07-16	$26,089,000
12014989	Device and method of very high density routing used with embedded multi-die interconnect bridge	Robert Alan May, Wei-Lun Kane Jen, Islam A. Salama, Kristof Darmawikarta	2024-06-18	$26,452,000
11769719	Dual trace thickness for single layer routing	Wei-Lun Kane Jen, Cheng Xu, Liwei Cheng, Andrew J. Brown, Yikang Deng	2023-09-26	$20,953,000
11508662	Device and method of very high density routing used with embedded multi-die interconnect bridge	Robert Alan May, Wei-Lun Kane Jen, Islam A. Salama, Kristof Darmawikarta	2022-11-22	$12,862,000
11495555	Magnetic bilayer structure for a cored or coreless semiconductor package	Yikang Deng, Andrew J. Brown, Junnan Zhao	2022-11-08	$15,080,000
11276618	Bi-layer prepreg for reduced dielectric thickness	Andrew J. Brown	2022-03-15	$18,336,000
10741947	Plated through hole socketing coupled to a solder ball to engage with a pin	Amruthavalli Pallavi Alur, Siddharth K. Alur, Liwei Cheng, Lauren A. Link, Sai Vadlamani +1 more	2020-08-11	$37,011,000
10734358	Multi-packaging for single-socketing	Amruthavalli Pallavi Alur, Arun Chandrasekhar, Shawna M. Liff	2020-08-04	$32,661,000
10535590	Multi-layer solder resists for semiconductor device package surfaces and methods of assembling same	—	2020-01-14	$30,813,000

Jonathan L. Rosch — 9 Patents

Issued Patents All Time

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