Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Rahul Jain — 44 Patents

Intel: 43 patents #801 of 30,777Top 3%
Gilbert, AZ: #33 of 1,739 inventorsTop 2%
Arizona: #548 of 32,909 inventorsTop 2%
Overall (All Time): #66,838 of 4,157,543Top 2%
44 Patents All Time
Rahul Jain has been granted 44 US patents while listed as an inventor at Intel. The first was granted in 2017 and the most recent in July 2025. Rahul Jain ranks #66,838 of 4,157,543 US inventors in our database (top 1.6%). Patent records list Rahul Jain in Gilbert, AZ, US.

Issued Patents All Time

Showing 1–25 of 44 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12362250 Protruding SN substrate features for epoxy flow control Edvin Cetegen, Jacob VEHONSKY, Nicholas S. Haehn, Thomas HEATON, Steve Cho +5 more 2025-07-15
12334447 Lithographically defined vertical interconnect access (VIA) for a bridge die first level interconnect (FLI) Kristof Darmawikarta, Tarek A. Ibrahim, Siddharth K. Alur, Haobo Chen 2025-06-17
12334453 Soldered metallic reservoirs for enhanced transient and steady-state thermal performance Nicholas Neal, Nicholas S. Haehn, Sergio Antonio Chan Arguedas, Edvin Cetegen, Jacob VEHONSKY +4 more 2025-06-17
12327773 Package with underfill containment barrier Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta, Ashish Dhall +4 more 2025-06-10
12224264 Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate Ji-Yong Park, Kyu Oh Lee 2025-02-11
12154715 Methods to selectively embed magnetic materials in substrate and corresponding structures Cheng Xu, Kyu Oh Lee, Junnan Zhao, Ji-Yong Park, Sai Vadlamani +1 more 2024-11-26 $26,820,000
12009271 Protruding SN substrate features for epoxy flow control Edvin Cetegen, Jacob VEHONSKY, Nicholas S. Haehn, Thomas HEATON, Steve Cho +5 more 2024-06-11 $21,221,000
11935805 Package with underfill containment barrier Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta, Ashish Dhall +4 more 2024-03-19 $28,784,000
11901115 Substrate assembly with encapsulated magnetic feature Kyu Oh Lee, Sai Vadlamani, Cheng Xu, Ji-Yong Park, Junnan Zhao +1 more 2024-02-13 $18,546,000
11881463 Coreless organic packages with embedded die and magnetic inductor structures Andrew J. Brown, Prithwish Chatterjee, Lauren A. Link, Sai Vadlamani 2024-01-23 $52,361,000
11862552 Methods of embedding magnetic structures in substrates Sai Vadlamani, Prithwish Chatterjee, Robert Alan May, Lauren A. Link, Andrew J. Brown +2 more 2024-01-02 $30,016,000
11842981 Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate Ji-Yong Park, Kyu Oh Lee 2023-12-12 $45,136,000
11776864 Corner guard for improved electroplated first level interconnect bump height range Jacob VEHONSKY, Nicholas S. Haehn, Thomas HEATON, Steve Cho, Tarek A. Ibrahim +4 more 2023-10-03 $24,984,000
11735537 Methods to embed magnetic material as first layer on coreless substrates and corresponding structures Cheng Xu, Kyu Oh Lee, Junnan Zhao, Ji-Yong Park, Sai Vadlamani +1 more 2023-08-22 $16,803,000
11737208 Microelectronic assemblies having conductive structures with different thicknesses Brandon C. Marin, Andrew J. Brown, Dilan Seneviratne, Praneeth Akkinepally, Frank Truong 2023-08-22 $16,803,000
11664290 Package with underfill containment barrier Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta, Ashish Dhall +4 more 2023-05-30 $16,378,000
11651902 Patterning of thin film capacitors in organic substrate packages Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani, Lauren A. Link 2023-05-16 $11,130,000
11652071 Electronic device package including a capacitor Brandon C. Marin, Shivasubramanian Balasubramanian, Praneeth Akkinepally, Jeremy Ecton 2023-05-16 $11,130,000
11610706 Release layer-assisted selective embedding of magnetic material in cored and coreless organic substrates Sai Vadlamani, Prithwish Chatterjee, Kyu Oh Lee, Sheng Li, Andrew J. Brown +1 more 2023-03-21 $20,076,000
11581271 Methods to pattern TFC and incorporation in the ODI architecture and in any build up layer of organic substrate Kyu Oh Lee, Islam A. Salama, Amruthavalli Pallavi Alur, Wei-Lun Kane Jen, Yongki Min +1 more 2023-02-14 $12,790,000
11557489 Cavity structures in integrated circuit package supports Sai Vadlamani, Junnan Zhao, Ji-Yong Park, Kyu Oh Lee, Cheng Xu 2023-01-17 $13,997,000
11450471 Methods to selectively embed magnetic materials in substrate and corresponding structures Cheng Xu, Kyu Oh Lee, Junnan Zhao, Ji-Yong Park, Sai Vadlamani +1 more 2022-09-20 $15,654,000
11443892 Substrate assembly with encapsulated magnetic feature Kyu Oh Lee, Sai Vadlamani, Cheng Xu, Ji-Yong Park, Junnan Zhao +1 more 2022-09-13 $14,653,000
11443885 Thin film barrier seed metallization in magnetic-plugged through hole inductor Kristof Darmawikarta, Srinivas V. Pietambaram, Sandeep Gaan, Sri Ranga Sai Boyapati, Prithwish Chatterjee +2 more 2022-09-13 $14,653,000
11432405 Methods for attaching large components in a package substrate for advanced power delivery Prithwish Chatterjee, Kyu Oh Lee 2022-08-30 $13,077,000