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Ashish Dhall

IN Intel: 6 patents #6,151 of 30,777Top 20%
Overall (All Time): #783,191 of 4,157,543Top 20%
6
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12327773 Package with underfill containment barrier Rahul Jain, Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta +4 more 2025-06-10
11935805 Package with underfill containment barrier Rahul Jain, Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta +4 more 2024-03-19
11664290 Package with underfill containment barrier Rahul Jain, Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta +4 more 2023-05-30
11158558 Package with underfill containment barrier Rahul Jain, Kyu Oh Lee, Siddharth K. Alur, Wei-Lun Kane Jen, Vipul V. Mehta +4 more 2021-10-26
10269695 Method for forming an electrical device and electrical devices Robert F. Cheney, Suriyakala Ramalingam 2019-04-23
9691675 Method for forming an electrical device and electrical devices Robert F. Cheney, Suriyakala Ramalingam 2017-06-27