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No mold shelf package design and process flow for advanced package architectures |
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Enhanced base die heat path using through-silicon vias |
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Substrate with thermal insulation |
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No mold shelf package design and process flow for advanced package architectures |
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| 11854935 |
Enhanced base die heat path using through-silicon vias |
Weston BERTRAND, Kyle Arrington, Shankar Devasenathipathy, Aaron McCann, Zhimin Wan |
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Full package vapor chamber with IHS |
Nicholas S. Haehn, Je-Young Chang, Kyle Arrington, Aaron McCann, Edvin Cetegen +4 more |
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Direct liquid micro jet (DLMJ) structures for addressing thermal performance at limited flow rate conditions |
Je-Young Chang, Jae Whan Kim, Ravindranath V. Mahajan |
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Corner guard for improved electroplated first level interconnect bump height range |
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Thermal management solutions for cored substrates |
Divya Mani, Nicholas S. Haehn |
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Substrate thermal layer for heat spreader connection |
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Thermal bump networks for integrated circuit device assemblies |
Prasad Ramanathan, Chandra Mohan Jha |
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Methods of forming multi-chip package structures |
Nicholas S. Haehn |
2020-02-04 |
| 10461011 |
Microelectronics package with an integrated heat spreader having indentations |
David W. Mendel, Chandra Mohan Jha, Kelly Lofgreen |
2019-10-29 |