Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11443885 | Thin film barrier seed metallization in magnetic-plugged through hole inductor | Kristof Darmawikarta, Srinivas V. Pietambaram, Sri Ranga Sai Boyapati, Prithwish Chatterjee, Sameer Paital +2 more | 2022-09-13 |
| 11387175 | Interposer package-on-package (PoP) with solder array thermal contacts | Debendra Mallik, Sanka Ganesan, Pilin Liu, Shawna M. Liff, Sri Chaitra Jyotsna Chavali +2 more | 2022-07-12 |
| 11291122 | Apparatus with a substrate provided with plasma treatment | Darko Grujicic, Rengarajan Shanmugam, Adrian BAYRAKTAROGLU, Roy Dittler, Ke-Tien Liu +4 more | 2022-03-29 |
| 11037802 | Package substrate having copper alloy sputter seed layer and high density interconnects | Robert Alan May, Kristof Darmawikarta, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram | 2021-06-15 |
| 9831098 | Methods for fabricating integrated circuits using flowable chemical vapor deposition techniques with low-temperature thermal annealing | Xinyuan Dou, Sukwon Hong, Satyajit Shinde, Tao Han, Carlos M. Chacon +1 more | 2017-11-28 |
| 9673039 | Devices comprising high-K dielectric layer and methods of forming same | Shishir Ray, Yiqun Liu, Jin Ping Liu, Fabio D'Addamio | 2017-06-06 |
| 9570291 | Semiconductor substrates and methods for processing semiconductor substrates | Shishir Ray, Sheldon Meyers, Nisha Pillai, Edmund K. Banghart, Kyle Jung | 2017-02-14 |
| 9520395 | FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack | Guillaume Bouche, Andy Wei, Xiang Hu, Jerome F. Wandell | 2016-12-13 |
| 9502232 | Inhibiting diffusion of elements between material layers of a layered circuit structure | Sipeng Gu, Zhiguo Sun, Huang Liu, Adam Selsley | 2016-11-22 |
| 9466701 | Processes for preparing integrated circuits with improved source/drain contact structures and integrated circuits prepared according to such processes | Sipeng Gu | 2016-10-11 |
| 9385192 | Shallow trench isolation integration methods and devices formed thereby | Hongliang Shen, Kyutae Na, Hsin-Neng Tai, Weihua Tong, Sang Cheol Han +6 more | 2016-07-05 |
| 9224842 | Patterning multiple, dense features in a semiconductor device using a memorization layer | Guillaume Bouche, Andy Wei, Xiang Hu, Jerome F. Wandell | 2015-12-29 |
| 9184288 | Semiconductor structures with bridging films and methods of fabrication | Sipeng Gu, Zhiguo Sun, Danni Chen, Wen-Pin Peng, Huang Liu | 2015-11-10 |
| 9123771 | Shallow trench isolation integration methods and devices formed thereby | Hongliang Shen, Kyutae Na, Hsin-Neng Tai, Weihua Tong, Sang Cheol Han +6 more | 2015-09-01 |
| 9076645 | Method of fabricating an interlayer structure of increased elasticity modulus | Shishir Ray, Jin Ping Liu, Zhiguo Sun | 2015-07-07 |
| 8940650 | Methods for fabricating integrated circuits utilizing silicon nitride layers | Huy Cao, Huang Liu, Hoong Shing Wong, Songkram Srivathanakul | 2015-01-27 |