Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12354963 | Lithographic cavity formation to enable EMIB bump pitch scaling | Kristof Darmawikarta, Hiroki Tanaka, Robert Alan May, Sameer Paital, Bai Nie +1 more | 2025-07-08 |
| 12334443 | Lithographic cavity formation to enable EMIB bump pitch scaling | Kristof Darmawikarta, Hiroki Tanaka, Robert Alan May, Sameer Paital, Bai Nie +1 more | 2025-06-17 |
| 12230563 | Method to enable 30 microns pitch EMIB or below | Hongxia Feng, Dingying Xu, Sheng Li, Matthew Tingey, Meizi Jiao | 2025-02-18 |
| 12176223 | Integrated circuit package supports | Kristof Darmawikarta, Robert Alan May, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram, Aleksandar Aleksov | 2024-12-24 |
| 11929330 | Lithographic cavity formation to enable EMIB bump pitch scaling | Kristof Darmawikarta, Hiroki Tanaka, Robert Alan May, Sameer Paital, Bai Nie +1 more | 2024-03-12 |
| 11854834 | Integrated circuit package supports | Kristof Darmawikarta, Robert Alan May, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram, Aleksandar Aleksov | 2023-12-26 |
| 11721631 | Via structures having tapered profiles for embedded interconnect bridge substrates | Jeremy Ecton, Hiroki Tanaka, Oscar Ojeda, Arnab Roy, Vahidreza Parichehreh +2 more | 2023-08-08 |
| 11676891 | Method to enable 30 microns pitch EMIB or below | Hongxia Feng, Dingying Xu, Sheng Li, Matthew Tingey, Meizi Jiao | 2023-06-13 |
| 11373951 | Via structures having tapered profiles for embedded interconnect bridge substrates | Jeremy Ecton, Hiroki Tanaka, Oscar Ojeda, Arnab Roy, Vahidreza Parichehreh +2 more | 2022-06-28 |
| 11322444 | Lithographic cavity formation to enable EMIB bump pitch scaling | Kristof Darmawikarta, Hiroki Tanaka, Robert Alan May, Sameer Paital, Bai Nie +1 more | 2022-05-03 |
| 11309192 | Integrated circuit package supports | Kristof Darmawikarta, Robert Alan May, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram, Aleksandar Aleksov | 2022-04-19 |
| 11264307 | Dual-damascene zero-misalignment-via process for semiconductor packaging | Aleksandar Aleksov, Hiroki Tanaka, Robert Alan May, Kristof Darmawikarta, Changhua Liu +2 more | 2022-03-01 |
| 11088062 | Method to enable 30 microns pitch EMIB or below | Hongxia Feng, Dingying Xu, Sheng Li, Matthew Tingey, Meizi Jiao | 2021-08-10 |
| 10403564 | Dual-damascene zero-misalignment-via process for semiconductor packaging | Aleksandar Aleksov, Hiroki Tanaka, Robert Alan May, Kristof Darmawikarta, Changhua Liu +2 more | 2019-09-03 |