Issued Patents All Time
Showing 1,026–1,050 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10177115 | Package structures and methods of forming | Der-Chyang Yeh, Hsien-Wei Chen | 2019-01-08 |
| 10177105 | Semiconductor structure and method of forming | Yu-Hsiang Hu, Hung-Jui Kuo | 2019-01-08 |
| 10177104 | Package on package structure and method for forming the same | Chung-Shi Liu, Ming-Da Cheng, Mirng-Ji Lii, Meng-Tse Chen, Wei-Hung Lin | 2019-01-08 |
| 10177078 | Method for forming chip package structure | Kuo-Chung Yee, Chun-Hui Yu | 2019-01-08 |
| 10175294 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chao-Hsiang Yang | 2019-01-08 |
| 10170451 | Semiconductor device method of manufacture | Jing-Cheng Lin, Po-Hao Tsai | 2019-01-01 |
| 10170396 | Through via structure extending to metallization layer | Yi-Hsiu Chen, Ku-Feng Yang, Wen-Chih Chiou, Shin-Puu Jeng | 2019-01-01 |
| 10163817 | Semiconductor device structure comprising a plurality of metal oxide fibers and method for forming the same | Jing-Cheng Lin, Szu-Wei Lu, Yen-Yao Chi | 2018-12-25 |
| 10162139 | Semicondcutor package | Chuei-Tang Wang, Jeng-Shien Hsieh, Hsing-Kuo Hsia | 2018-12-25 |
| 10163705 | Profile of through via protrusion in 3DIC interconnect | Jiung Wu, Kuan-Liang Lai, Ming-Tsu Chung, Hong-Ye Shih, Ku-Feng Yang +3 more | 2018-12-25 |
| 10163709 | Semiconductor device and method | Hung-Pin Chang, Yi-Hsiu Chen, Ku-Feng Yang, Wen-Chih Chiou | 2018-12-25 |
| 10163734 | Method for manufacturing semiconductor structure | Chih-Fan Huang, Chun-Hung Lin, Ming-Da Cheng, Chung-Shi Liu, Mirng-Ji Lii | 2018-12-25 |
| 10163750 | Package structure for heat dissipation | Sung-Feng Yeh, Ming-Fa Chen | 2018-12-25 |
| 10163756 | Isolation structure for stacked dies | Hung-Pin Chang, Kuo-Ching Hsu, Chen-Shien Chen, Wen-Chih Chiou | 2018-12-25 |
| 10163780 | Wireless charging package with chip integrated in coil center | Chiang-Jui Chu, Chung-Shi Liu, Hao-Yi Tsai, Ming Hung Tseng, Hung-Yi Kuo | 2018-12-25 |
| 10163785 | Semiconductor die contact structure and method | Chung-Shi Liu | 2018-12-25 |
| 10163802 | Fan-out package having a main die and a dummy die, and method of forming | Yan-Fu Lin, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen | 2018-12-25 |
| 10163804 | Molding structure for wafer level package | Chung-Shi Liu, Chih-Fan Huang, Hui-Min Huang, Wei-Hung Lin, Ming-Da Cheng | 2018-12-25 |
| 10163822 | Chip-on-substrate packaging on carrier | Tzu-Shiun Sheu, Shin-Puu Jeng, Shih-Peng Tai, An-Jhih Su, Chi-Hsi Wu | 2018-12-25 |
| 10163835 | Solder bump stretching method | Su-Chun Yang, Yi-Li Hsiao, Chih-Hang Tung | 2018-12-25 |
| 10163841 | Multi-chip package and method of formation | Jing-Cheng Lin, Jui-Pin Hung, Der-Chyang Yeh | 2018-12-25 |
| 10163849 | Method of manufacturing semiconductor structure | Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang +9 more | 2018-12-25 |
| 10163851 | Tri-layer CoWoS structure | Shang-Yun Hou, Yun-Han Lee | 2018-12-25 |
| 10163852 | Integrated fan-out package including voltage regulators and methods forming same | Chih-Yuan Chang, Chuei-Tang Wang, Jeng-Shien Hsieh | 2018-12-25 |
| 10163853 | Formation method of chip package | Wen-Hsin Wei, Chi-Hsi Wu, Hsien-Pin Hu, Shang-Yun Hou, Wei-Ming Chen | 2018-12-25 |