Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12394684 | Die stacking structure, semiconductor package and formation method of the die stacking structure | Su-Chun Yang, Jih-Churng Twu, Chih-Hang Tung, Chen-Hua Yu | 2025-08-19 |
| 11004741 | Profile of through via protrusion in 3DIC interconnect | Kuan-Liang Lai, Ming-Tsu Chung, Hong-Ye Shih, Ku-Feng Yang, Tsang-Jiuh Wu +3 more | 2021-05-11 |
| 10566237 | Profile of through via protrusion in 3DIC interconnect | Kuan-Liang Lai, Ming-Tsu Chung, Hong-Ye Shih, Ku-Feng Yang, Tsang-Jiuh Wu +3 more | 2020-02-18 |
| 10163705 | Profile of through via protrusion in 3DIC interconnect | Kuan-Liang Lai, Ming-Tsu Chung, Hong-Ye Shih, Ku-Feng Yang, Tsang-Jiuh Wu +3 more | 2018-12-25 |
| 10074595 | Self-alignment for redistribution layer | Ku-Feng Yang, Ming-Tsu Chung, Hong-Ye Shih, Chen-Yu Tsai, Hsin-Yu Chen +2 more | 2018-09-11 |
| 9786580 | Self-alignment for redistribution layer | Ku-Feng Yang, Ming-Tsu Chung, Hong-Ye Shih, Chen-Yu Tsai, Hsin-Yu Chen +2 more | 2017-10-10 |
| 8691706 | Reducing substrate warpage in semiconductor processing | Chen-Hua Yu, Wen-Chih Chiou, Fang Wen Tsai, Kuang-Wei Cheng, Jiann Sheng Chang +1 more | 2014-04-08 |