Issued Patents All Time
Showing 26–50 of 87 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7194725 | System and method for design rule creation and selection | Todd P. Lukanc, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim, Christopher A. Spence +1 more | 2007-03-20 |
| 7183223 | Methods for forming small contacts | Srikanteswara Dakshina-Murthy, Chih-Yuh Yang, Bin Yu | 2007-02-27 |
| 7169711 | Method of using carbon spacers for critical dimension (CD) reduction | Christopher F. Lyons, Philip A. Fisher, Richard J. Huang | 2007-01-30 |
| 7122455 | Patterning with rigid organic under-layer | Christopher F. Lyons, Marina V. Plat, Srikanteswara Dakshina-Murthy, Scott A. Bell | 2006-10-17 |
| 7118967 | Protection of charge trapping dielectric flash memory devices from UV-induced charging in BEOL processing | Minh Van Ngo, Ning Cheng, Jeff P. Erhardt, Clarence B. Ferguson, John Caffall +2 more | 2006-10-10 |
| 7091097 | End-of-range defect minimization in semiconductor device | Eric N. Paton, Qi Xiang, Bin Yu, Robert B. Ogle | 2006-08-15 |
| 7091088 | UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing | Ning Cheng, Clarence B. Ferguson, Emmanuil H. Lingunis, Minh Van Ngo, Joerg Reiss +2 more | 2006-08-15 |
| 7091068 | Planarizing sacrificial oxide to improve gate critical dimension in semiconductor devices | Shibly S. Ahmed, Bin Yu | 2006-08-15 |
| 7084071 | Use of multilayer amorphous carbon ARC stack to eliminate line warpage phenomenon | Srikanteswara Dakshina-Murthy, Scott A. Bell, Richard J. Huang, Richard Nguyen | 2006-08-01 |
| 7052961 | Method for forming wordlines having irregular spacing in a memory array | Hidehiko Shiraiwa, Jean Y. Yang, Jaeyong Park | 2006-05-30 |
| 7029959 | Source and drain protection and stringer-free gate formation in semiconductor devices | Chih-Yuh Yang, Shibly S. Ahmed, Srikanteswara Dakshina-Murhty, Bin Yu | 2006-04-18 |
| 7029958 | Self aligned damascene gate | Shibly S. Ahmed, Matthew S. Buynoski, Srikanteswara Dakshina-Murthy, Zoran Krivokapic, Haihong Wang +2 more | 2006-04-18 |
| 7018868 | Disposable hard mask for memory bitline scaling | Jean Y. Yang, Jeff P. Erhardt, Weidong Qian, Mark T. Ramsbey, Jaeyong Park +1 more | 2006-03-28 |
| 7015124 | Use of amorphous carbon for gate patterning | Philip A. Fisher, Richard J. Huang | 2006-03-21 |
| 7014966 | Method and apparatus for elimination of bubbles in immersion medium in immersion lithography systems | Adam R. Pawloski, Amr Y. Abdo, Gilles Amblard, Bruno M. LaFontaine, Ivan Lalovic +3 more | 2006-03-21 |
| 6995437 | Semiconductor device with core and periphery regions | Hiroyuki Kinoshita, Yu Sun, Basab Banerjee, Christopher Foster, John R. Behnke | 2006-02-07 |
| 6989563 | Flash memory cell with UV protective layer | Krishnashree Achuthan, Patrick K. Cheung, Jean Y. Yang, Ning Cheng, Minh Van Ngo | 2006-01-24 |
| 6987048 | Memory device having silicided bitlines and method of forming the same | Ning Cheng, Hiroyuki Kinoshita, Jeff P. Erhardt, Mark T. Ramsbey, Jean Y. Yang | 2006-01-17 |
| 6972576 | Electrical critical dimension measurement and defect detection for reticle fabrication | Christopher F. Lyons, Khoi A. Phan, Bhanwar Singh | 2005-12-06 |
| 6933219 | Tightly spaced gate formation through damascene process | Emmanuil H. Lingunis, Krishnashree Achuthan, Minh Van Ngo, Jean Y. Yang | 2005-08-23 |
| 6931618 | Feed forward process control using scatterometry for reticle fabrication | Bharath Rangarajan, Bhanwar Singh, Ramkumar Subramanian | 2005-08-16 |
| 6905971 | Treatment of dielectric material to enhance etch rate | Chih-Yuh Yang, William G. En, Joong S. Jeon, Minh Van Ngo, Ming-Ren Lin | 2005-06-14 |
| 6902966 | Low-temperature post-dopant activation process | Bin Yu, Robert B. Ogle, Eric N. Paton, Qi Xiang | 2005-06-07 |
| 6875664 | Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material | Richard J. Huang, Srikanteswara Dakshina-Murthy, Philip A. Fisher, Lu You | 2005-04-05 |
| 6872647 | Method for forming multiple fins in a semiconductor device | Bin Yu, Judy Xilin An | 2005-03-29 |