Issued Patents All Time
Showing 25 most recent of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11069789 | Varied silicon richness silicon nitride formation | Yi Ma, Shenqing Fang | 2021-07-20 |
| 10644126 | Varied silicon richness silicon nitride formation | Yi Ma, Shenqing Fang | 2020-05-05 |
| 9012333 | Varied silicon richness silicon nitride formation | Yi Ma, Shenqing Fang | 2015-04-21 |
| 8803216 | Memory cell system using silicon-rich nitride | Meng Ding, Lei Xue, Mark Randolph, Chi Chang | 2014-08-12 |
| 8563441 | Methods for fabricating memory cells having fin structures with smooth sidewalls and rounded top corners and edges | Yi Ma | 2013-10-22 |
| 7964905 | Anti-reflective interpoly dielectric | Marina V. Plat, Mark T. Ramsbey | 2011-06-21 |
| 7863175 | Zero interface polysilicon to polysilicon gate for flash memory | Joong S. Jeon, Eric N. Paton, Austin Frenkel | 2011-01-04 |
| 7863128 | Non-volatile memory device with improved erase speed | Joong S. Jeon, Takashi Orimoto, Harpreet Sachar, Wei Zheng | 2011-01-04 |
| 7602067 | Hetero-structure variable silicon rich nitride for multiple level memory flash memory device | Yi Ma | 2009-10-13 |
| 7354826 | Method for forming memory array bitlines comprising epitaxially grown silicon and related structure | Takashi Orimoto, Rinji Sugino | 2008-04-08 |
| 7351638 | Scanning laser thermal annealing | Cyrus E. Tabery, Eric N. Paton, Bin Yu, Qi Xiang | 2008-04-01 |
| 7211489 | Localized halo implant region formed using tilt pre-amorphization implant and laser thermal anneal | Qi Xiang, Eric N. Paton, Cyrus E. Tabery, Bin Yu | 2007-05-01 |
| 7091097 | End-of-range defect minimization in semiconductor device | Eric N. Paton, Qi Xiang, Cyrus E. Tabery, Bin Yu | 2006-08-15 |
| 7026211 | Semiconductor component and method of manufacture | Rinji Sugino, Joong S. Jeon | 2006-04-11 |
| 7001814 | Laser thermal annealing methods for flash memory devices | Arvind Halliyal, Mark T. Ramsbey | 2006-02-21 |
| 6992370 | Memory cell structure having nitride layer with reduced charge loss and method for fabricating same | George Jonathan Kluth, Robert Clark-Phelps, Joong S. Jeon, Huicai Zhong, Arvind Halliyal +3 more | 2006-01-31 |
| 6902966 | Low-temperature post-dopant activation process | Bin Yu, Eric N. Paton, Cyrus E. Tabery, Qi Xiang | 2005-06-07 |
| 6867097 | Method of making a memory cell with polished insulator layer | Mark T. Ramsbey, Tommy Hsiao, Angela T. Hui, Tuan Pham, Marina V. Plat +1 more | 2005-03-15 |
| 6867080 | Polysilicon tilting to prevent geometry effects during laser thermal annealing | Eric N. Paton, Cyrus E. Tabery, Qi Xiang, Bin Yu | 2005-03-15 |
| 6858496 | Oxidizing pretreatment of ONO layer for flash memory | Arvind Halliyal | 2005-02-22 |
| 6849925 | Preparation of composite high-K/standard-K dielectrics for semiconductor devices | Arvind Halliyal, Joong S. Jeon, Minh Van Ngo | 2005-02-01 |
| 6825115 | Post silicide laser thermal annealing to avoid dopant deactivation | Qi Xiang, Eric N. Paton, Cyrus E. Tabery, Bin Yu | 2004-11-30 |
| 6812106 | Reduced dopant deactivation of source/drain extensions using laser thermal annealing | Qi Xiang, Eric N. Paton, Cyrus E. Tabery, Bin Yu | 2004-11-02 |
| 6803272 | Use of high-K dielectric material in modified ONO structure for semiconductor devices | Arvind Halliyal, Mark T. Ramsbey, Kuo-Tung Chang, Nicholas H. Tripsas | 2004-10-12 |
| 6798002 | Dual-purpose anti-reflective coating and spacer for flash memory and other dual gate technologies and method of forming | Tuan Pham, Mark T. Ramsbey | 2004-09-28 |