Issued Patents All Time
Showing 1–25 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204142 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2025-01-21 |
| 10768362 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2020-09-08 |
| 10403639 | Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same | James Kai, Sayako Nagamine, Takaaki Iwai, Shigeyuki Sugihara, Shuji Minagawa | 2019-09-03 |
| 10310178 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2019-06-04 |
| 10297610 | Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same | James Kai, Johann Alsmeier, Shinsuke Yada, Akihisa SAI, Sayako Nagamine +1 more | 2019-05-21 |
| 10103169 | Method of making a three-dimensional memory device using a multi-step hot phosphoric acid wet etch process | Chun Ge, Fei Zhou, Yanli Zhang, Raghuveer S. Makala | 2018-10-16 |
| 9946017 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2018-04-17 |
| 9754836 | Packaging methods for fabrication of analytical device packages and analytical device packages made thereof | Ravi Saxena, Elizabeth Logan | 2017-09-05 |
| 9658161 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2017-05-23 |
| 9379120 | Metal control gate structures and air gap isolation in non-volatile memory | Vinod R. Purayath, Tuan Pham, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin +3 more | 2016-06-28 |
| 9372308 | Arrays of integrated analytical devices and methods for production | Ravi Saxena, Michael Tzu Ru, Annette Grot, Mathieu Foquet, Hou-Pu Chou | 2016-06-21 |
| 8946022 | Integrated nanostructure-based non-volatile memory fabrication | Vinod R. Purayath, James Kai, Masaaki Higashitani, George Matamis, Henry Chien | 2015-02-03 |
| 8946803 | Method of forming a floating gate with a wide base and a narrow stem | George Matamis, Henry Chien, Vinod R. Purayath, James Kai | 2015-02-03 |
| 8877586 | Process for forming resistive switching memory cells using nano-particles | James Kai, Vinod R. Purayath, George Matamis | 2014-11-04 |
| 8803220 | P-type control gate in non-volatile storage | Atsushi Suyama, Ming Tian, Henry Chin, Henry Chien, Vinod R. Purayath +1 more | 2014-08-12 |
| 8587049 | Memory cell system with charge trap | Meng Ding, Amol Joshi, Lei Xue, Kuo-Tung Chang | 2013-11-19 |
| 8546214 | P-type control gate in non-volatile storage and methods for forming same | Atsushi Suyama, Ming Tian, Henry Chin, Henry Chien, Vinod R. Purayath +1 more | 2013-10-01 |
| 8546152 | Enhanced endpoint detection in non-volatile memory fabrication processes | George Matamis, James Kai, Vinod R. Purayath | 2013-10-01 |
| 8492224 | Metal control gate structures and air gap isolation in non-volatile memory | Vinod R. Purayath, Tuan Pham, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin +3 more | 2013-07-23 |
| 8409951 | Metal control gate formation in non-volatile storage | Jarrett Jun Liang, Vinod R. Purayath | 2013-04-02 |
| 8383479 | Integrated nanostructure-based non-volatile memory fabrication | Vinod R. Purayath, James Kai, Masaaki Higashitani, George Matamis, Henry Chien | 2013-02-26 |
| 8278203 | Metal control gate formation in non-volatile storage | Jarrett Jun Liang, Vinod R. Purayath | 2012-10-02 |
| 8263465 | Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer | Vinod R. Purayath, George Matamis, James Kai, Tuan Pham | 2012-09-11 |
| 8222091 | Damascene method of making a nonvolatile memory device | Vinod R. Purayath, George Matamis, James Kai | 2012-07-17 |
| 8207036 | Method for forming self-aligned dielectric cap above floating gate | Vinod R. Purayath, George Matamis, Henry Chien, James Kai | 2012-06-26 |