Issued Patents All Time
Showing 25 most recent of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406729 | Non-volatile memory with inter-die connection | Shiqian Shao, Fumiaki Toyama | 2025-09-02 |
| 11973044 | Non-volatile memory with efficient signal routing | Shiqian Shao, Fumiaki Toyama | 2024-04-30 |
| 10950352 | System, computer-readable storage medium and method of deep learning of texture in short time series | — | 2021-03-16 |
| 10679723 | Direct memory characterization using periphery transistors | Dong-Kyu Lee, Kelvin Yih-Yuh Doong, Klaus Schuegraf, Christoph Dolainsky, Huan-Tsung Huang +1 more | 2020-06-09 |
| 10283566 | Three-dimensional memory device with through-stack contact via structures and method of making thereof | Jongsun Sel, Mitsuteru Mushiga, Yoshihiro Ikeda, Daewung Kang, Akio Nishida | 2019-05-07 |
| 10224373 | Three-dimensional ReRAM memory device employing replacement word lines and methods of making the same | Jongsun Sel, Mitsuteru Mushiga, Vincent Shih, Akio Nishida | 2019-03-05 |
| 10115770 | Methods and apparatus for three-dimensional nonvolatile memory | Jongsun Sel, Daewung Kang, Michiaki Sano, Yohei Yamada, Mitsuteru Mushiga | 2018-10-30 |
| 10103161 | Offset backside contact via structures for a three-dimensional memory device | Fumitoshi Ito, Masaaki Higashitani, Cheng-Chung Chu, Jayavel Pachamuthu | 2018-10-16 |
| 10014316 | Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof | Fabo Yu, Jayavel Pachamuthu, Jongsun Sel, Cheng-Chung Chu, Yao-Sheng Lee +3 more | 2018-07-03 |
| 9917093 | Inter-plane offset in backside contact via structures for a three-dimensional memory device | Cheng-Chung Chu, Jayavel Pachamuthu, Fumitoshi Ito, Masaaki Higashitani | 2018-03-13 |
| 9842851 | Three-dimensional memory devices having a shaped epitaxial channel portion | Jayavel Pachamuthu | 2017-12-12 |
| 9768270 | Method of selectively depositing floating gate material in a memory device | Marika Gunji-Yoneoka, Atsushi Suyama, Kensuke Yamaguchi, Hiroyuki Kinoshita, Raghuveer S. Makala +2 more | 2017-09-19 |
| 9711522 | Memory hole structure in three dimensional memory | Chan Park, Jong-Sun Sel | 2017-07-18 |
| 9659956 | Three-dimensional memory device containing source select gate electrodes with enhanced electrical isolation | Jayavel Pachamuthu, Henry Chien | 2017-05-23 |
| 9613806 | Triple patterning NAND flash memory | Jongsun Sel, Mun-Pyo Hong | 2017-04-04 |
| 9601508 | Blocking oxide in memory opening integration scheme for three-dimensional memory structure | Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Hiroyuki Ogawa +6 more | 2017-03-21 |
| 9460958 | Air gap isolation in non-volatile memory | Vinod R. Purayath, Hiroyuki Kinoshita | 2016-10-04 |
| 9379120 | Metal control gate structures and air gap isolation in non-volatile memory | Vinod R. Purayath, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin, James Kai +3 more | 2016-06-28 |
| 9337085 | Air gap formation between bit lines with side protection | Jong-Sun Sel, Marika Gunji-Yoneoka, Naoki Takeguchi, Chan Park, Kazuya Tokunaga | 2016-05-10 |
| 9330969 | Air gap formation between bit lines with top protection | Jong-Sun Sel, Marika Gunji-Yoneoka, Naoki Takeguchi, Chan Park, Kazuya Tokunaga | 2016-05-03 |
| 9224221 | Arranged display of data associated with a set of time periods | Andreas Vogel, Lauren McMullen, Simon Lee | 2015-12-29 |
| 9224475 | Structures and methods for making NAND flash memory | Jongsun Sel, Kazuya Tokunaga, Hiro Kinoshita | 2015-12-29 |
| 9153595 | Methods of making word lines and select lines in NAND flash memory | Jongsun Sel, Kazuya Tokunaga | 2015-10-06 |
| 9129854 | Full metal gate replacement process for NAND flash memory | Kazuya Tokunaga, Jongsun Sel, Marika Gunji-Yoneoka | 2015-09-08 |
| 9099532 | Processes for NAND flash memory fabrication | Jongsun Sel | 2015-08-04 |