Issued Patents All Time
Showing 25 most recent of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170248 | Graphene BEOL integration interconnection structures | Kaustav Banerjee, Brian Cronquist | 2024-12-17 |
| 10679723 | Direct memory characterization using periphery transistors | Dong-Kyu Lee, Kelvin Yih-Yuh Doong, Tuan Pham, Christoph Dolainsky, Huan-Tsung Huang +1 more | 2020-06-09 |
| 9502294 | Method and system for wafer level singulation | Seshadri Ramaswami, Michael R. Rice, Mohsen Salek, Claes Bjorkman | 2016-11-22 |
| 9232569 | Solid state light source assisted processing | Joseph R. Johnson, John E. Gerling | 2016-01-05 |
| 8994089 | Interlayer polysilicon dielectric cap and method of forming thereof | Matthew S. Rogers | 2015-03-31 |
| 8853763 | Integrated circuits with sidewall nitridation | Tuan Pham, Sanghyun Lee, Masato Horiike, Masaaki Higashitani, Keiichi Isono | 2014-10-07 |
| 8709953 | Pulsed plasma with low wafer temperature for ultra thin layer etches | Thorsten Lill, Dmitry Lubomirsky | 2014-04-29 |
| 8637845 | Optimized electrodes for Re-RAM | Deepak C. Sekar, April D. Schricker, Xiying Chen | 2014-01-28 |
| 8580615 | Method and system for wafer level singulation | Seshadri Ramaswami, Michael R. Rice, Mohsen Salek, Claes Bjorkman | 2013-11-12 |
| 8498146 | Programming reversible resistance switching elements | Deepak C. Sekar, Roy E. Scheuerlein | 2013-07-30 |
| 8288293 | Integrated circuit fabrication using sidewall nitridation processes | Tuan Pham, Sanghyun Lee, Masato Horiike, Masaaki Higashitani, Keiichi Isono | 2012-10-16 |
| 8263420 | Optimized electrodes for Re-RAM | Depak C. Sekar, April D. Schricker, Xiying Chen, Raghuveer S. Makala | 2012-09-11 |
| 8154904 | Programming reversible resistance switching elements | Deepak C. Sekar, Roy E. Scheuerlein | 2012-04-10 |
| 7876620 | Read disturb mitigation in non-volatile memory | Nima Mokhlesi | 2011-01-25 |
| 7808831 | Read disturb mitigation in non-volatile memory | Nima Mokhlesi | 2010-10-05 |
| 7176549 | Shallow trench isolation using low dielectric constant insulator | Aftab Ahmad | 2007-02-13 |
| 7105405 | Rugged metal electrodes for metal-insulator-metal capacitors | — | 2006-09-12 |
| 7067411 | Method to prevent metal oxide formation during polycide reoxidation | Scott DeBoer, Randhir P. S. Thakur | 2006-06-27 |
| 7009264 | Selective spacer to prevent metal oxide formation during polycide reoxidation | Scott DeBoer, Randhir P. S. Thakur | 2006-03-07 |
| 6992338 | CMOS transistor spacers formed in a BiCMOS process | Kevin Q. Yin, Amol Kalburge | 2006-01-31 |
| 6974780 | Semiconductor processing methods of chemical vapor depositing SiO2 on a substrate | — | 2005-12-13 |
| 6972442 | Efficiently fabricated bipolar transistor | — | 2005-12-06 |
| 6965132 | Polycrystalline silicon emitter having an accurately controlled critical dimension | — | 2005-11-15 |
| 6908803 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | Carl Marshall Eliot Powell, Randhir P. S. Thakur | 2005-06-21 |
| 6830625 | System for fabricating a bipolar transistor | — | 2004-12-14 |