TP

Tuan Pham

ST Sandisk Technologies: 57 patents #67 of 2,224Top 4%
AM AMD: 39 patents #213 of 9,279Top 3%
Fujitsu Limited: 3 patents #8,614 of 24,456Top 40%
SO Sony: 2 patents #12,963 of 25,231Top 55%
HP HP: 1 patents #8,774 of 16,619Top 55%
PS Pdf Solutions: 1 patents #76 of 143Top 55%
PU Prince Mohammad Bin Fahd University: 1 patents #51 of 84Top 65%
SS Sap Se: 1 patents #2,890 of 6,322Top 50%
📍 San Jose, CA: #254 of 32,062 inventorsTop 1%
🗺 California: #2,203 of 386,348 inventorsTop 1%
Overall (All Time): #14,217 of 4,157,543Top 1%
101
Patents All Time

Issued Patents All Time

Showing 26–50 of 101 patents

Patent #TitleCo-InventorsDate
8969206 Triple patterning NAND flash memory with stepped mandrel Jongsun Sel, Mun-Pyo Hong 2015-03-03
8932948 Memory cell floating gate replacement Jongsun Sel, Ming Tian 2015-01-13
8879331 Shared bit line string architecture Jongsun Sel, Seungpil Lee, Kwang Ho Kim 2014-11-04
8877627 Method of forming PN floating gate non-volatile storage elements and transistor having N+ gate Mohan Dunga, Sanghyun Lee, Masaaki Higashitani 2014-11-04
8853763 Integrated circuits with sidewall nitridation Sanghyun Lee, Masato Horiike, Klaus Schuegraf, Masaaki Higashitani, Keiichi Isono 2014-10-07
8603890 Air gap isolation in non-volatile memory Vinod R. Purayath, George Matamis, Eli Harari, Hiroyuki Kinoshita 2013-12-10
8546239 Methods of fabricating non-volatile memory with air gaps Eli Harari, Yupin Fong, Vinod R. Purayath 2013-10-01
8503229 P-/Metal floating gate non-volatile storage element Sanghyun Lee, Mohan Dunga, Masaaki Higashitani, Franz Kreupl 2013-08-06
8492224 Metal control gate structures and air gap isolation in non-volatile memory Vinod R. Purayath, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin, James Kai +3 more 2013-07-23
8330779 ADC calibration for color on LCD with no standardized color bar for geographic area in which LCD is located Louis Le 2012-12-11
8288293 Integrated circuit fabrication using sidewall nitridation processes Sanghyun Lee, Masato Horiike, Klaus Schuegraf, Masaaki Higashitani, Keiichi Isono 2012-10-16
8288225 Method of reducing coupling between floating gates in nonvolatile memory Henry Chien, George Matamis, Masaaki Higashitani, Hidetaka Horiuchi, Jeffrey W. Lutze +2 more 2012-10-16
8263465 Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer Vinod R. Purayath, George Matamis, Takashi Orimoto, James Kai 2012-09-11
8193055 Method of forming memory with floating gates including self-aligned metal nanodots using a polymer solution Vinod R. Purayath, George Matamis, Takashi Orimoto, James Kai 2012-06-05
7960266 Spacer patterns using assist layer for high density semiconductor devices James Kai, George Matamis, Masaaki Higashitani, Takashi Orimoto 2011-06-14
7910434 Method of reducing coupling between floating gates in nonvolatile memory Henry Chien, George Matamis, Masaaki Higashitani, Hidetaka Horiuchi, Jeffrey W. Lutze +2 more 2011-03-22
7795080 Methods of forming integrated circuit devices using composite spacer structures Takashi Orimoto, George Matamis, James Kai, Masaaki Higashitani, Henry Chien 2010-09-14
7773403 Spacer patterns using assist layer for high density semiconductor devices James Kai, George Matamis, Masaaki Higashitani, Takashi Orimoto 2010-08-10
7723186 Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer Vinod R. Purayath, George Matamis, Takashi Orimoto, James Kai 2010-05-25
7704832 Integrated non-volatile memory and peripheral circuitry fabrication James Kai, Masaaki Higashitani, George Matamis, Takashi Orimoto 2010-04-27
7672165 Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices Masaaki Higashitani, Hao Fang, Gerrit Jan Hemink 2010-03-02
7615445 Methods of reducing coupling between floating gates in nonvolatile memory Henry Chien, George Matamis, Masaaki Higashitani, Hidetaka Horiuchi, Jeffrey W. Lutze +2 more 2009-11-10
7592223 Methods of fabricating non-volatile memory with integrated select and peripheral circuitry and post-isolation memory cell formation Takashi Orimoto, Masaaki Higashitani, James Kai, George Matamis 2009-09-22
7592225 Methods of forming spacer patterns using assist layer for high density semiconductor devices James Kai, George Matamis, Masaaki Higashitani, Takashi Orimoto 2009-09-22
7582529 Methods of fabricating non-volatile memory with integrated peripheral circuitry and pre-isolation memory cell formation George Matamis, Takashi Orimoto, Masaaki Higashitani, James Kai 2009-09-01