Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10121794 | Three-dimensional memory device having epitaxial germanium-containing vertical channel and method of making thereof | Marika Gunji-Yoneoka, Atsushi Suyama, Jayavel Pachamuthu, Tsuyoshi Hada, Daewung Kang +4 more | 2018-11-06 |
| 9985046 | Method of forming a staircase in a semiconductor device using a linear alignment control feature | Zhenyu Lu, Jixin Yu, Koji Miyata, Makoto Yoshida, Johann Alsmeier +1 more | 2018-05-29 |
| 9716101 | Forming 3D memory cells after word line replacement | Zhenyu Lu, Daxin Mao, Johann Alsmeier, Wenguang Shi, Yingda Dong +3 more | 2017-07-25 |
| 9455352 | HTO offset for long leffective, better device performance | Ning Cheng, Huaqiang Wu, Jihwan P. Choi, Angela T. Hui | 2016-09-27 |
| 9245895 | Oro and orpro with bit line trench to suppress transport program disturb | Ning Cheng, Kuo-Tung Chang, Chih-Yuh Yang, Lei Xue, Chungho Lee +3 more | 2016-01-26 |
| 9224475 | Structures and methods for making NAND flash memory | Jongsun Sel, Tuan Pham, Kazuya Tokunaga | 2015-12-29 |
| 8653581 | HTO offset for long Leffective, better device performance | Ning Cheng, Huaqiang Wu, Jihwan P. Choi, Angela T. Hui | 2014-02-18 |
| 8330209 | HTO offset and BL trench process for memory device to improve device performance | Ning Cheng, Huaqiang Wu, Jihwan P. Choi | 2012-12-11 |
| 8012830 | ORO and ORPRO with bit line trench to suppress transport program disturb | Ning Cheng, Kuo-Tung Chang, Chih-Yuh Yang, Lei Xue, Chungho Lee +3 more | 2011-09-06 |
| 7943983 | HTO offset spacers and dip off process to define junction | Huaqiang Wu, Ning Cheng, Arturo Ruiz, Jihwan P. Choi | 2011-05-17 |
| 7935596 | HTO offset and BL trench process for memory device to improve device performance | Ning Cheng, Huaqiang Wu, Jihwan P. Choi | 2011-05-03 |
| 7906807 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Harpreet Sachar +3 more | 2011-03-15 |
| 7776688 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Harpreet Sachar +3 more | 2010-08-17 |