| 10354956 |
Three-dimensional memory device containing hydrogen diffusion barrier structures for CMOS under array architecture and method of making the same |
Jixin Yu, Hiroyuki Ogawa, Johann Alsmeier |
2019-07-16 |
| 10269620 |
Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof |
Jixin Yu, Zhenyu Lu, Hiroyuki Ogawa, Kensuke Yamaguchi, Sung-Tae Lee +2 more |
2019-04-23 |
| 10256248 |
Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof |
Zhenyu Lu, Jixin Yu, Johann Alsmeier, Fumiaki Toyama, Yuki Mizutani +5 more |
2019-04-09 |
| 10249640 |
Within-array through-memory-level via structures and method of making thereof |
Jixin Yu, Zhenyu Lu, Alexander Chu, Kensuke Yamaguchi, Hiroyuki Ogawa +2 more |
2019-04-02 |
| 10217746 |
Three-dimensional memory device having L-shaped word lines and a support structure and methods of making the same |
Tae Kyung Kim, Raghuveer S. Makala, Yanli Zhang, Hiroyuki Kinoshita, Jixin Yu +5 more |
2019-02-26 |
| 10115732 |
Three dimensional memory device containing discrete silicon nitride charge storage regions |
Jixin Yu, Zhenyu Lu, Yanli Zhang, Andrey Serov, Chun Ge +1 more |
2018-10-30 |
| 10056399 |
Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same |
Xiying Costa, Christopher J. Petti, Dana Lee, Yao-Sheng Lee |
2018-08-21 |
| 10008570 |
Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device |
Jixin Yu, Kento KITAMURA, Tong Zhang, Chun Ge, Yanli Zhang +6 more |
2018-06-26 |
| 9985046 |
Method of forming a staircase in a semiconductor device using a linear alignment control feature |
Zhenyu Lu, Jixin Yu, Koji Miyata, Makoto Yoshida, Johann Alsmeier +1 more |
2018-05-29 |
| 9859363 |
Self-aligned isolation dielectric structures for a three-dimensional memory device |
Zhenyu Lu, Kota Funayama, Chun-Ming Wang, Jixin Yu, Chenche Huang +4 more |
2018-01-02 |
| 9853043 |
Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material |
Zhenyu Lu, Tong Zhang, Johann Alsmeier, Wenguang Shi, Henry Chien |
2017-12-26 |
| 9728551 |
Multi-tier replacement memory stack structure integration scheme |
Ching-Huang Lu, Zhenyu Lu, Jixin Yu, Johann Alsmeier, Wenguang Shi +1 more |
2017-08-08 |
| 9716101 |
Forming 3D memory cells after word line replacement |
Zhenyu Lu, Hiro Kinoshita, Johann Alsmeier, Wenguang Shi, Yingda Dong +3 more |
2017-07-25 |
| 9679906 |
Three-dimensional memory devices containing memory block bridges |
Zhenyu Lu, Johann Alsmeier, Wenguang Shi, Sateesh Koka, Raghuveer S. Makala +3 more |
2017-06-13 |
| 9673213 |
Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereof |
Jixin Yu, Yanli Zhang, Zhenyu Lu, Johann Alsmeier |
2017-06-06 |
| 9543318 |
Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors |
Zhenyu Lu, Koji Miyata, Junichi Ariyoshi, Johann Alsmeier, George Matamis +3 more |
2017-01-10 |
| 9449987 |
Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors |
Koji Miyata, Zhenyu Lu, Andrew Lin, Jixin Yu, Johann Alsmeier +1 more |
2016-09-20 |
| 8337279 |
Closed-loop control for effective pad conditioning |
Sivakumar Dhandapani, Stan Tsai, Sameer Deshpande, Shou-Sung Chang, Gregory E. Menk +4 more |
2012-12-25 |
| 7879255 |
Method and composition for electrochemically polishing a conductive material on a substrate |
Huyen Karen Tran, Renhe Jia, You Wang, Stan Tsai, Martin S. Wohlert |
2011-02-01 |
| 7582564 |
Process and composition for conductive material removal by electrochemical mechanical polishing |
Zhihong Wang, You Wang, Renhe Jia, Stan Tsai, Yongqi Hu +2 more |
2009-09-01 |
| 7210988 |
Method and apparatus for reduced wear polishing pad conditioning |
Yan Wang, Stan Tsai, Yongqi Hu, Feng Q. Liu, Liang-Yuh Chen +4 more |
2007-05-01 |
