Issued Patents All Time
Showing 1–25 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10573388 | Non-volatile storage system with adjustable select gates as a function of temperature | Mahim Raj Gupta, Mohsen Purahmad, Bo Lei, Joanna Lai | 2020-02-25 |
| 10388390 | Word line dependent pass voltages in non-volatile memory | — | 2019-08-20 |
| 10355007 | Three-dimensional memory structure having a back gate electrode | Dana Lee, Yanli Zhang, Johann Alsmeier, Yingda Dong, Akira Matsudaira | 2019-07-16 |
| 10283208 | Word line dependent pass voltages in non-volatile memory | — | 2019-05-07 |
| 10056399 | Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same | Daxin Mao, Christopher J. Petti, Dana Lee, Yao-Sheng Lee | 2018-08-21 |
| 10049758 | Word line dependent pass voltages in non-volatile memory | — | 2018-08-14 |
| 9672917 | Stacked vertical memory array architectures, systems and methods | Henry Chien, Yao-Sheng Lee, Yanli Zhang | 2017-06-06 |
| 9515080 | Vertical NAND and method of making thereof using sequential stack etching and landing pad | Akira Takahashi, Chi-Ming Wang, Johann Alsmeier, Henry Chien | 2016-12-06 |
| 9460799 | Recovery of partially programmed block in non-volatile memory | Dana Lee, Zhenming Zhou | 2016-10-04 |
| 9330778 | Group word line erase and erase-verify methods for 3D non-volatile memory | Alex Mak, Johann Alsmeier, Man Lung Mui | 2016-05-03 |
| 9331090 | Compact three dimensional vertical NAND and method of making thereof | Johann Alsmeier, Raghuveer S. Makala, Yanli Zhang | 2016-05-03 |
| 9240241 | Pseudo block operation mode in 3D NAND | Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Lung Mui | 2016-01-19 |
| 9177673 | Selection of data for redundancy calculation by likely error rate | Deepak Raghu, Gautam Dusija, Chris Avila, Yingda Dong, Man Lung Mui +1 more | 2015-11-03 |
| 9142304 | Erase operation for 3D non-volatile memory with controllable gate-induced drain leakage current | Haibo Li, Masaaki Higashitani, Man Lung Mui | 2015-09-22 |
| 9136022 | Selection of data for redundancy calculation by likely error rate | Deepak Raghu, Gautam Dusija, Chris Avila, Yingda Dong, Man Lung Mui +1 more | 2015-09-15 |
| 9099202 | 3D stacked non-volatile storage programming to conductive state | Andrei Mihnea, Yanli Zhang | 2015-08-04 |
| 9047973 | Group word line erase and erase-verify methods for 3D non-volatile memory | Alex Mak, Johann Alsmeier, Man Lung Mui | 2015-06-02 |
| 9019775 | Erase operation for 3D non-volatile memory with controllable gate-induced drain leakage current | Haibo Li, Masaaki Higashitani, Man Lung Mui | 2015-04-28 |
| 8934292 | Balanced method for programming multi-layer cell memories | Yibo Nian, Roy E. Scheuerlein, Tz-Yi Liu, Chandrasekhar Gorla | 2015-01-13 |
| 8923054 | Pseudo block operation mode in 3D NAND | Alexander Kwog-Tung Mak, Chris Avila, Gautam Dusija, Man Lung Mui | 2014-12-30 |
| 8913431 | Pseudo block operation mode in 3D NAND | Alexander Kwok-Tung Mak, Chris Avila, Gautam Dusija, Man Lung Mui | 2014-12-16 |
| 8908444 | Erase for 3D non-volatile memory with sequential selection of word lines | Seung Yu, Roy E. Scheuerlein, Haibo Li, Man Lung Mui | 2014-12-09 |
| 8908435 | Erase operation with controlled select gate voltage for 3D non-volatile memory | Haibo Li, Chenfeng Zhang | 2014-12-09 |
| 8885412 | Erase operation with controlled select gate voltage for 3D non-volatile memory | Haibo Li, Chenfeng Zhang | 2014-11-11 |
| 8883589 | Counter doping compensation methods to improve diode performance | Abhijit Bandyopadhyay, Kun Hou, Brian Le, Yung-Tin Chen | 2014-11-11 |