Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11422886 | Die level data redundancy in solid state storage devices | Vamsi Sata, Monish Shah | 2022-08-23 |
| 8982637 | Vread bias allocation on word lines for read disturb reduction in 3D non-volatile memory | Yingda Dong, Wendy Ou, Seung Yu, Masaaki Higashitani | 2015-03-17 |
| 8908435 | Erase operation with controlled select gate voltage for 3D non-volatile memory | Haibo Li, Xiying Costa | 2014-12-09 |
| 8885412 | Erase operation with controlled select gate voltage for 3D non-volatile memory | Haibo Li, Xiying Costa | 2014-11-11 |