Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8802537 | System and method for improving reliability in a semiconductor device | Yider Wu, Unsoon Kim, Kuo-Tung Chang | 2014-08-12 |
| 8642441 | Self-aligned STI with single poly for manufacturing a flash memory device | Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, Youseok Suh, Meng Ding +5 more | 2014-02-04 |
| 8143661 | Memory cell system with charge trap | Shenqing Fang, Rinji Sugino, Jayendra D. Bhakta, Takashi Orimoto, Hiroyuki Nansei +8 more | 2012-03-27 |
| 8119477 | Memory system with protection layer to cover the memory gate stack and methods for forming same | Hidehiko Shiraiwa, Youseok Suh, Satoshi Torii | 2012-02-21 |
| 7985687 | System and method for improving reliability in a semiconductor device | Angela T. Hui, Hiroyuki Kinoshita, Unsoon Kim | 2011-07-26 |
| 7906807 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Phillip Jones +3 more | 2011-03-15 |
| 7863128 | Non-volatile memory device with improved erase speed | Joong S. Jeon, Takashi Orimoto, Robert B. Ogle, Wei Zheng | 2011-01-04 |
| 7776688 | Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics | Ning Cheng, Calvin T. Gabriel, Angela T. Hui, Lei Xue, Phillip Jones +3 more | 2010-08-17 |
| 7675104 | Integrated circuit memory system employing silicon rich layers | Amol Joshi, Youseok Suh, Shenqing Fang, Chih-Yuh Yang, Lovejeet Singh +6 more | 2010-03-09 |
| 7446369 | SONOS memory cell having high-K dielectric | Takashi Orimoto, Joong S. Jeon, Hidehiko Shiraiwa, Simon S. Chan | 2008-11-04 |
| 7439141 | Shallow trench isolation approach for improved STI corner rounding | Unsoon Kim, Yu Sun, Hiroyuki Kinoshita, Kuo-Tung Chang, Mark S. Chang | 2008-10-21 |
| 7381620 | Oxygen elimination for device processing | Boon Yong Ang, Hidehiko Shiraiwa, Simon S. Chan, Mark Randolph | 2008-06-03 |
| 7307002 | Non-critical complementary masking method for poly-1 definition in flash memory device fabrication | Unsoon Kim, Hiroyuki Kinoshita, Yu Sun, Krishnashree Achuthan, Christopher H. Raeder +2 more | 2007-12-11 |
| 7202128 | Method of forming a memory device having improved erase speed | Takashi Orimoto | 2007-04-10 |
| 7071538 | One stack with steam oxide for charge retention | Hidehiko Shiraiwa, Mark Randolph, Wei Zheng | 2006-07-04 |
| 6767791 | Structure and method for suppressing oxide encroachment in a floating gate memory cell | Yider Wu, Jean Y. Yang | 2004-07-27 |
| 6670691 | Shallow trench isolation fill process | Unsoon Kim, Jack F. Thomas | 2003-12-30 |
| 6576487 | Method to distinguish an STI outer edge current component with an STI normal current component | Zhigang Wang, Kuo-Tung Chang | 2003-06-10 |
| 6566230 | Shallow trench isolation spacer for weff improvement | Unsoon Kim, Mark S. Chang, Chih-Yuh Yang, Jayendra D. Bhakta | 2003-05-20 |