JB

Jayendra D. Bhakta

AM AMD: 17 patents #646 of 9,279Top 7%
SL Spansion Llc.: 1 patents #435 of 769Top 60%
Overall (All Time): #258,469 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8143661 Memory cell system with charge trap Shenqing Fang, Rinji Sugino, Takashi Orimoto, Hiroyuki Nansei, Yukio Hayakawa +8 more 2012-03-27
7084074 CVD gas injector and method therefor Michael D'Elia, Barry Sheffield, Raymond Branstetter 2006-08-01
7061075 Shallow trench isolation using antireflection layer Carl P. Babcock 2006-06-13
6821883 Shallow trench isolation using antireflection layer Carl P. Babcock 2004-11-23
6645868 Method of forming shallow trench isolation using antireflection layer Carl P. Babcock 2003-11-11
6605517 Method for minimizing nitride residue on a silicon wafer Krishnashree Achuthan, Angela T. Hui 2003-08-12
6566230 Shallow trench isolation spacer for weff improvement Harpreet Sachar, Unsoon Kim, Mark S. Chang, Chih-Yuh Yang 2003-05-20
6500774 Method and apparatus for an increased throughput furnace nitride BARC process 2002-12-31
6482573 Exposure correction based on reflective index for photolithographic process control Zicheng Gary Ling, Weizhong Wang, Warren T. Yu, Eric Kent 2002-11-19
6475892 Simplified method of patterning polysilicon gate in a semiconductor device 2002-11-05
6458212 Mesh filter design for LPCVD TEOS exhaust system Fuodoor Gologhlan, David Chi, Kent Kuohua Chang, Hector Serrato 2002-10-01
6337264 Simplified method of patterning polysilicon gate in a semiconductor device including an oxime layer as a mask 2002-01-08
6335235 Simplified method of patterning field dielectric regions in a semiconductor device Carl P. Babcock 2002-01-01
6333218 Method of etching contacts with reduced oxide stress Minh Van Ngo, Paul R. Besser 2001-12-25
6303507 In-situ feedback system for localized CMP thickness control Weizhong Wang 2001-10-16
6258697 Method of etching contacts with reduced oxide stress Paul R. Besser, Minh Van Ngo 2001-07-10
6255717 Shallow trench isolation using antireflection layer Carl P. Babcock 2001-07-03
6107167 Simplified method of patterning polysilicon gate in a semiconductor device 2000-08-22