Issued Patents All Time
Showing 1–25 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12237387 | Method of spacer formation with straight sidewall of memory cells | Angela T. Hui, Scott A. Bell | 2025-02-25 |
| 11450680 | Split gate charge trapping memory cells having different select gate and memory gate heights | Chun Chen, Mark T. Ramsbey | 2022-09-20 |
| 11342429 | Memory first process flow and device | Chun Chen, Unsoon Kim, Mark T. Ramsbey, Kuo-Tung Chang, Sameer Haddad +1 more | 2022-05-24 |
| 11257675 | Tilted implant for poly resistors | Timothy Thurgate, Kuo-Tung Chang | 2022-02-22 |
| 11069789 | Varied silicon richness silicon nitride formation | Yi Ma, Robert B. Ogle | 2021-07-20 |
| 11069699 | NAND memory cell string having a stacked select gate structure and process for forming same | Ming Sang Kwan, Youseok Suh, Michael A. Van Buskirk | 2021-07-20 |
| 10923601 | Charge trapping split gate device and method of fabricating same | Chun Chen, Unsoon Kim, Mark T. Ramsbey, Kuo-Tung Chang, Sameer Haddad | 2021-02-16 |
| 10833013 | Memory device interconnects and method of manufacture | Connie P. Wang, Wen Yu, Fei Wang | 2020-11-10 |
| 10833009 | Memory device interconnects and method of manufacture | Connie P. Wang, Wen Yu, Fei Wang | 2020-11-10 |
| 10818761 | Memory first process flow and device | Chun Chen, Unsoon Kim, Mark T. Ramsbey, Kuo-Tung Chang, Sameer Haddad +1 more | 2020-10-27 |
| 10777568 | Split gate charge trapping memory cells having different select gate and memory gate heights | Chun Chen, Mark T. Ramsbey | 2020-09-15 |
| 10756101 | NAND memory cell string having a stacked select gate structure and process for for forming same | Ming Sang Kwan, Youseok Suh, Michael A. Van Buskirk | 2020-08-25 |
| 10686044 | Multi-layer inter-gate dielectric structure and method of manufacturing thereof | Chun Chen | 2020-06-16 |
| 10644126 | Varied silicon richness silicon nitride formation | Yi Ma, Robert B. Ogle | 2020-05-05 |
| 10644016 | Charge-trapping memory device | Kuo-Tung Chang, Timothy Thurgate | 2020-05-05 |
| 10622370 | System and method for manufacturing self-aligned STI with single poly | Tim Thurgate, Kuo-Tung Chang, Youseok Suh, Meng Ding, Hidehiko Shiraiwa +5 more | 2020-04-14 |
| 10593688 | Split-gate semiconductor device with L-shaped gate | Scott A. Bell, Chun Chen, Lei Xue, Angela T. Hui | 2020-03-17 |
| 10566341 | NAND memory cell string having a stacked select gate structure and process for for forming same | Ming Sang Kwan, Youseok Suh, Michael A. Van Buskirk | 2020-02-18 |
| 10446245 | Non-volatile memory array with memory gate line and source line scrambling | Chun Chen, Yoram Betser, Kuo-Tung Chang, Amichai Givant, Shivananda Shetty | 2019-10-15 |
| 10403731 | Memory first process flow and device | Chun Chen, Unsoon Kim, Mark T. Ramsbey, Kuo-Tung Chang, Sameer Haddad +1 more | 2019-09-03 |
| 10361215 | NAND memory cell string having a stacked select gate structure and process for for forming same | Ming Sang Kwan, Youseok Suh, Michael A. Van Buskirk | 2019-07-23 |
| 10236299 | Three-dimensional charge trapping NAND cell with discrete charge trapping film | Chun Chen, Kuo-Tung Chang | 2019-03-19 |
| 10192747 | Multi-layer inter-gate dielectric structure and method of manufacturing thereof | Chun Chen | 2019-01-29 |
| 10192627 | Non-volatile memory array with memory gate line and source line scrambling | Chun Chen, Yoram Betser, Kuo-Tung Chang, Amichai Givant, Shivananda Shetty | 2019-01-29 |
| 10177040 | Manufacturing of FET devices having lightly doped drain and source regions | Unsoon Kim | 2019-01-08 |