Issued Patents All Time
Showing 25 most recent of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8815727 | Integrated circuit with metal and semi-conducting gate | Angela T. Hui, Kuo-Tung Chang, Scott A. Bell | 2014-08-26 |
| 8507969 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Hao Fang, King Wai Kelwin Ko | 2013-08-13 |
| 8445372 | Selective silicide formation using resist etch back | Kyunghoon Min, Angela T. Hui, Hiroyuki Kinoshita, Ning Cheng | 2013-05-21 |
| 8329530 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Hao Fang, King Wai Kelwin Ko | 2012-12-11 |
| 8283718 | Integrated circuit system with metal and semi-conducting gate | Angela T. Hui, Kuo-Tung Chang, Scott A. Bell | 2012-10-09 |
| 8183619 | Method and system for providing contact to a first polysilicon layer in a flash memory device | Hao Fang, King Wai Kelwin Ko | 2012-05-22 |
| 8035153 | Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applications | Shenqing Fang, Jihwan P. Choi, Calvin T. Gabriel, Fei Wang, Angela T. Hui +4 more | 2011-10-11 |
| 7732276 | Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications | Shenqing Fang, Jihwan P. Choi, Calvin T. Gabriel, Fei Wang, Angela T. Hui +4 more | 2010-06-08 |
| 7691751 | Selective silicide formation using resist etchback | Kyunghoon Min, Angela T. Hui, Hiroyuki Kinoshita, Ning Cheng | 2010-04-06 |
| 7622389 | Selective contact formation using masking and resist patterning techniques | Kyunghoon Min, Ning Cheng, Brian Osborn, Kevin Song, Fei Wang +3 more | 2009-11-24 |
| 7439141 | Shallow trench isolation approach for improved STI corner rounding | Unsoon Kim, Yu Sun, Hiroyuki Kinoshita, Kuo-Tung Chang, Harpreet Sachar | 2008-10-21 |
| 7374654 | Method of making an organic memory cell | Sergey Lopatin, Ramkumar Subramanian | 2008-05-20 |
| 7361588 | Etch process for CD reduction of arc material | Phillip Jones, Scott A. Bell | 2008-04-22 |
| 7256141 | Interface layer between dual polycrystalline silicon layers | Mark T. Ramsbey, Weidong Qian, Eric N. Paton | 2007-08-14 |
| 7015504 | Sidewall formation for high density polymer memory element array | Christopher F. Lyons, Sergey Lopatin, Ramkumar Subramanian, Patrick K. Cheung, Minh Van Ngo +1 more | 2006-03-21 |
| 6979619 | Flash memory device and a method of fabrication thereof | Hao Fang, Yue-Song He, Kent Kuohua Chang | 2005-12-27 |
| 6900488 | Multi-cell organic memory element and methods of operating and fabricating | Sergey Lopatin, Minh Van Ngo, Patrick K. Cheung | 2005-05-31 |
| 6878961 | Photosensitive polymeric memory elements | Christopher F. Lyons, Ramkumar Subramanian | 2005-04-12 |
| 6864556 | CVD organic polymer film for advanced gate patterning | Lu You, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Richard J. Huang +2 more | 2005-03-08 |
| 6836398 | System and method of forming a passive layer by a CMP process | Ramkumar Subramanian, Jane V. Oglesby, Minh Van Ngo, Sergey Lopatin, Angela T. Hui +3 more | 2004-12-28 |
| 6825060 | Photosensitive polymeric memory elements | Christopher F. Lyons, Ramkumar Subramanian | 2004-11-30 |
| 6815292 | Flash memory having improved core field isolation in select gate regions | Hao Fang | 2004-11-09 |
| 6812077 | Method for patterning narrow gate lines | Darin A. Chan, Douglas J. Bonser | 2004-11-02 |
| 6806165 | Isolation trench fill process | Dawn Hopper, Minh Van Ngo | 2004-10-19 |
| 6797552 | Method for defect reduction and enhanced control over critical dimensions and profiles in semiconductor devices | Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy | 2004-09-28 |