Issued Patents All Time
Showing 25 most recent of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9828767 | Prefabricated lightweight steel wall tensioning system | John Lanzilotta | 2017-11-28 |
| 9477619 | Programmable latency count to achieve higher memory bandwidth | Qamrul Hasan, Clifford Alan Zitlaw | 2016-10-25 |
| 7977797 | Integrated circuit with contact region and multiple etch stop insulation layer | Wenmei Li, Angela T. Hui, Kouros Ghandehari | 2011-07-12 |
| 7572727 | Semiconductor formation method that utilizes multiple etch stop layers | Wenmei Li, Angela T. Hui, Kouros Ghandehari | 2009-08-11 |
| 7361587 | Semiconductor contact and nitride spacer formation system and method | Wenmei Li, Angela T. Hui, Kouros Ghandehari | 2008-04-22 |
| 7297592 | Semiconductor memory with data retention liner | Minh Van Ngo, Arvind Halliyal, Tazrien Kamal, Hidehiko Shiraiwa, Rinji Sugino +1 more | 2007-11-20 |
| 7118967 | Protection of charge trapping dielectric flash memory devices from UV-induced charging in BEOL processing | Minh Van Ngo, Ning Cheng, Jeff P. Erhardt, Clarence B. Ferguson, Cyrus E. Tabery +2 more | 2006-10-10 |
| 7070911 | Structure and method for reducing standing waves in a photoresist | Kouros Ghandehari, Minh Van Ngo | 2006-07-04 |
| 7071562 | Interconnects with improved barrier layer adhesion | Minh Van Ngo | 2006-07-04 |
| 7005387 | Method for preventing an increase in contact hole width during contact formation | Hiroyuki Kinoshita, Christy Mei-Chu Woo | 2006-02-28 |
| 6969654 | Flash NVROM devices with UV charge immunity | Tuan Pham, Mark T. Ramsbey, Jeffrey A. Shields, Angela T. Hui | 2005-11-29 |
| 6900121 | Laser thermal annealing to eliminate oxide voiding | Minh Van Ngo, Arvind Halliyal | 2005-05-31 |
| 6867063 | Organic spin-on anti-reflective coating over inorganic anti-reflective coating | Kouros Ghandehari, Wenmei Li, Angela T. Hui | 2005-03-15 |
| 6809402 | Reflowable-doped HDP film | Minh Van Ngo, Atul Gupta, Tyagamohan Gottipati, John Caffall | 2004-10-26 |
| 6806165 | Isolation trench fill process | Minh Van Ngo, Mark S. Chang | 2004-10-19 |
| 6803265 | Liner for semiconductor memories and manufacturing method therefor | Minh Van Ngo, Arvind Halliyal, Tazrien Kamal, Hidehiko Shiraiwa, Rinji Sugino +1 more | 2004-10-12 |
| 6784095 | Phosphine treatment of low dielectric constant materials in semiconductor device manufacturing | Suzette K. Pangrle, Minh Van Ngo, Lu You | 2004-08-31 |
| 6756672 | Use of sic for preventing copper contamination of low-k dielectric layers | Lu You, Suzette K. Pangrle | 2004-06-29 |
| 6723634 | Method of forming interconnects with improved barrier layer adhesion | Minh Van Ngo | 2004-04-20 |
| 6713874 | Semiconductor devices with dual nature capping/arc layers on organic-doped silica glass inter-layer dielectrics | Lu You, Minh Van Ngo | 2004-03-30 |
| 6686232 | Ultra low deposition rate PECVD silicon nitride | Minh Van Ngo, Robert A. Huertas, Hieu Pham | 2004-02-03 |
| 6677679 | Use of SiO2/Sin for preventing copper contamination of low-k dielectric layers | Lu You, Fei Wang | 2004-01-13 |
| 6656830 | Dual damascene with silicon carbide middle etch stop layer/ARC | Ramkumar Subramanian, Fei Wang, Lynne A. Okada | 2003-12-02 |
| 6653190 | Flash memory with controlled wordline width | Jean Y. Yang, Kouros Ghandehari, Tazrien Kamal, Minh Van Ngo, Mark T. Ramsbey +2 more | 2003-11-25 |
| 6645853 | Interconnects with improved barrier layer adhesion | Minh Van Ngo | 2003-11-11 |