LO

Lynne A. Okada

AM AMD: 37 patents #234 of 9,279Top 3%
Overall (All Time): #90,953 of 4,157,543Top 3%
37
Patents All Time

Issued Patents All Time

Showing 25 most recent of 37 patents

Patent #TitleCo-InventorsDate
7279410 Method for forming inlaid structures for IC interconnections Fei Wang, James Kai 2007-10-09
7256499 Ultra low dielectric constant integrated circuit system Lu You, Fei Wang, Minh Quoc Tran 2007-08-14
7208418 Sealing sidewall pores in low-k dielectrics Minh Quoc Tran, Fei Wang, Lu You 2007-04-24
7001840 Interconnect with multiple layers of conductive material with grain boundary between the layers Minh Quoc Tran, Lu You, Fei Wang 2006-02-21
6872663 Method for reworking a multi-layer photoresist following an underlayer development 2005-03-29
6846749 N-containing plasma etch process with reduced resist poisoning Calvin T. Gabriel, Ramkumar Subramanian 2005-01-25
6767827 Method for forming dual inlaid structures for IC interconnections Fei Wang, James Kai 2004-07-27
6756300 Method for forming dual damascene interconnect structure Fei Wang, Jerry Cheng, Minh Quoc Tran, Lu You 2004-06-29
6713382 Vapor treatment for repairing damage of low-k dielectric Suzette K. Pangrle, Ecran Adem, Calvin T. Gabriel 2004-03-30
6699792 Polymer spacers for creating small geometry space and method of manufacture thereof Fei Wang, Lu You 2004-03-02
6660619 Dual damascene metal interconnect structure with dielectric studs Suzette K. Pangrle, Fei Wang 2003-12-09
6656830 Dual damascene with silicon carbide middle etch stop layer/ARC Ramkumar Subramanian, Dawn Hopper, Fei Wang 2003-12-02
6632707 Method for forming an interconnect structure using a CVD organic BARC to mitigate via poisoning Fei Wang, Ramkumar Subramanian, James Kai, Calvin T. Gabriel, Lu You 2003-10-14
6610608 Plasma etching using combination of CHF3 and CH3F Fei Wang, Calvin T. Gabriel 2003-08-26
6603206 Slot via filled dual damascene interconnect structure without middle etch stop layer Fei Wang, Ramkumar Subramanian, Calvin T. Gabriel 2003-08-05
6599839 Plasma etch process for nonhomogenous film Calvin T. Gabriel, Dawn Hopper, Suzette K. Pangrle, Fei Wang 2003-07-29
6583046 Post-treatment of low-k dielectric for prevention of photoresist poisoning Fei Wang, Calvin T. Gabriel 2003-06-24
6534397 Pre-treatment of low-k dielectric for prevention of photoresist poisoning Fei Wang, Calvin T. Gabriel 2003-03-18
6521524 Via filled dual damascene structure with middle stop layer and method for making the same Fei Wang, Ramkumar Subramanian, Calvin T. Gabriel 2003-02-18
6514860 Integration of organic fill for dual damascene process Fei Wang, James Kai 2003-02-04
6495447 Use of hydrogen doping for protection of low-k dielectric layers Calvin T. Gabriel 2002-12-17
6492272 Carrier gas modification for use in plasma ashing of photoresist Fei Wang 2002-12-10
6475929 Method of manufacturing a semiconductor structure with treatment to sacrificial stop layer producing diffusion to an adjacent low-k dielectric layer lowering the constant Calvin T. Gabriel, Suzette K. Pangrle, Fei Wang 2002-11-05
6472231 Dielectric layer with treated top surface forming an etch stop layer and method of making the same Calvin T. Gabriel 2002-10-29
6465340 Via filled dual damascene structure with middle stop layer and method for making the same Fei Wang, Ramkumar Subramanian, Calvin T. Gabriel 2002-10-15