Issued Patents All Time
Showing 25 most recent of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11056646 | Memory device having programmable impedance elements with a common conductor formed below bit lines | Mark T. Ramsbey, Venkatesh P. Gopinath, Kuei-Chang Tsai, Chakravarthy Gopalan, Michael A. Van Buskirk | 2021-07-06 |
| 10497868 | Memory elements having conductive cap layers and methods therefor | John Ross Jameson, Kuei-Chang Tsai | 2019-12-03 |
| 9595671 | Methods of fabricating storage elements and structures having edgeless features for programmable layer(s) | Kuei-Chang Tsai, Pascal Verrier | 2017-03-14 |
| 9455037 | EEPROM memory cell with low voltage read path and high voltage erase/write path | Kent Hewitt, Jack T. Wong, Bomy Chen, Sonu Daryanani, Daniel A. Alvarez +1 more | 2016-09-27 |
| 9412945 | Storage elements, structures and methods having edgeless features for programmable layer(s) | Kuei-Chang Tsai, Pascal Verrier | 2016-08-09 |
| 9391270 | Memory cells with vertically integrated tunnel access device and programmable impedance element | Venkatesh P. Gopinath, Yi Ma, Chakravarthy Gopalan, Ming Sung Kwon, John Dinh | 2016-07-12 |
| 9099633 | Solid electrolyte memory elements with electrode interface for improved performance | Chakravarthy Gopalan, Wei Ti Lee, Yi Ma | 2015-08-04 |
| 8941089 | Resistive switching devices and methods of formation thereof | Chakravarthy Gopalan, Venkatesh P. Gopinath, Janet Wang, Kuei-Chang Tsai | 2015-01-27 |
| 8895953 | Programmable memory elements, devices and methods having physically localized structure | John Ross Jameson, Wei Ti Lee | 2014-11-25 |
| 8866122 | Resistive switching devices having a buffer layer and methods of formation thereof | Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Kuei-Chang Tsai, Janet Wang | 2014-10-21 |
| 8847192 | Resistive switching devices having alloyed electrodes and methods of formation thereof | Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Philippe Blanchard, John Ross Jameson +3 more | 2014-09-30 |
| 8368219 | Buried silicide local interconnect with sidewall spacers and method for making the same | Arvind Halliyal, Zoran Krivokapic, Matthew S. Buynoski, Nicholas H. Tripsas, Minh Van Ngo +2 more | 2013-02-05 |
| 8232175 | Damascene metal-insulator-metal (MIM) device with improved scaleability | Suzette K. Pangrle, Steven C. Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor +5 more | 2012-07-31 |
| 8094503 | Method of programming an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Kent Hewitt, Donald S. Gerber | 2012-01-10 |
| 8089113 | Damascene metal-insulator-metal (MIM) device | Suzette K. Pangrle, Steven C. Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor +5 more | 2012-01-03 |
| 8049334 | Buried silicide local interconnect with sidewall spacers and method for making the same | Arvind Halliyal, Zoran Krivokapic, Matthew S. Buynoski, Nicholas H. Tripsas, Minh Van Ngo +2 more | 2011-11-01 |
| 8022468 | Ultraviolet radiation blocking interlayer dielectric | Minh Van Ngo, Wenmei Li, Ning Cheng, Angela T. Hui, Cinti X. Chen | 2011-09-20 |
| 7817474 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Kent Hewitt, Donald S. Gerber | 2010-10-19 |
| 7790497 | Method to prevent alloy formation when forming layered metal oxides by metal oxidation | Steven C. Avanzino, Joffre F. Bernard, Suzette K. Pangrle | 2010-09-07 |
| 7776682 | Ordered porosity to direct memory element formation | Alexander H. Nickel, Suzette K. Pangrle, Steven C. Avanzino, Fei Wang, Minh Quoc Tran +2 more | 2010-08-17 |
| 7476604 | Aggressive cleaning process for semiconductor device contact formation | Ning Cheng, Minh Van Ngo, Jinsong Yin, Paul R. Besser, Connie P. Wang +4 more | 2009-01-13 |
| 7468296 | Thin film germanium diode with low reverse breakdown | Ercan Adem, Matthew S. Buynoski, Robert J. Chiu, Bryan K. Choo, Calvin T. Gabriel +5 more | 2008-12-23 |
| 7466591 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Kent Hewitt, Donald S. Gerber | 2008-12-16 |
| 7384800 | Method of fabricating metal-insulator-metal (MIM) device with stable data retention | Steven C. Avanzino, Sameer Haddad, An-Chung Chen, Yi-Ching Wu, Suzette K. Pangrle | 2008-06-10 |
| 7232765 | Utilization of a Ta-containing cap over copper to facilitate concurrent formation of copper vias and memory element structures | Steven C. Avanzino, Nicholas H. Tripsas, Fei Wang, Richard Kingsborough, William Leonard +1 more | 2007-06-19 |